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參數資料
| 型號： | 935250600112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24 |
| 文件頁數： | 2/16頁 |
| 文件大?。?/td> | 135K |
| 代理商： | 935250600112 |
Philips Semiconductors
Product specification
74LVC646A
Octal bus transceiver/register (3-State)
2000 Jun 21
10
AC WAVEFORMS (
Continued)
VM = 1.5 V at VCC w 2.7 V
VM = 0.5 V * VCC at VCC t 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3 V at VCC w 2.7 V
VX = VOL + 0.1 VCC at VCC < 2.7 V
VY = VOH – 0.3 V at VCC w 2.7 V
VY = VOH – 0.1 VCC at VCC < 2.7 V
SV00757
tPHZ
tPZH
tPZL
tPLZ
tPZH
tPZL
VX
VOL
VY
VOH
VI
VCC
GND
VOH
VM
tPHZ
DIR INPUT
An OUTPUT
Bn OUTPUT
AnOUTPUT
Figure 5. Input DIR to output An, Bn 3-State enable and disable
times.
TEST CIRCUIT
PULSE
GENERATOR
VI
RT
D.U.T.
VO
CL
50pF
S1
2 x VCC
Open
GND
500
500
VCC
VI
t 2.7V
VCC
2.7V – 3.6V
2.7V
Test
S1
GND
tPLZ/tPZL
2 x VCC
tPHZ/tPZH
tPLH/tPHL
Open
SY00003
VCC
Figure 6. Load circuitry for switching times.
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