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參數(shù)資料
| 型號： | 935249730118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)器 |
| 英文描述： | 4000/14000/40000 SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16 |
| 封裝： | PLASTIC, SOT-109, SO-16 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 42K |
| 代理商： | 935249730118 |
January 1995
2
Philips Semiconductors
Product specication
12-stage binary counter
HEF4040B
MSI
DESCRIPTION
The HEF4040B is a 12-stage binary ripple counter with a
clock input (CP), an overriding asynchronous master reset
input (MR) and twelve fully buffered outputs (O0 to O11).
The counter advances on the HIGH to LOW transition of
CP. A HIGH on MR clears all counter stages and forces all
outputs LOW, independent of CP. Each counter stage is a
static toggle flip-flop. Schmitt-trigger action in the clock
input makes the circuit highly tolerant to slower clock rise
and fall times.
Fig.1 Functional diagram.
HEF4040BP(N):
16-lead DIL; plastic
(SOT38-1)
HEF4040BD(F):
16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4040BT(D):
16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
PINNING
APPLICATION INFORMATION
Some examples of applications for the HEF4040B are:
Frequency dividing circuits
Time delay circuits
Control counters
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
CP
clock input (HIGH to LOW edge-triggered)
MR
master reset input (active HIGH)
O0 to O11
parallel outputs
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