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參數(shù)資料
| 型號： | 935247880557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 畫面疊加 |
| 英文描述： | PICTURE-IN-PICTURE IC, PQFP100 |
| 封裝： | PLASTIC, SOT-317-2, QFP-100 |
| 文件頁數(shù)： | 2/35頁 |
| 文件大小： | 273K |
| 代理商： | 935247880557 |
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1996 Aug 13
10
Philips Semiconductors
Preliminary specication
Picture-In-Picture (PIP) controller
SAB9076H
Fig.3 Display fine positioning.
handbook, full pagewidth
MGC964
BGHFP
BGVFP
MAIN CHANNEL
SUB CHANNEL
SAHFP
MAVFP
238 lines
MAHFP
SAVFP
696 pixels
PIP modes
The two independent acquisition channels can be
controlled independently on the display side. A wide
variety of modes is possible but a subset of 7 modes is
fixed and can be set easily by the I2C-bus. An overview of
the preconditioned modes is given in Table 3. For all PIP
modes the main and sub-display fine positioning must be
set to obtain a display configuration.
DATA TRANSFER
The internal data path has an 8-bit resolution and 4 :1:1
data format. The communication to the external VDRAM
takes place at 864
× Hsync (both display and acquisition).
Approximately 800 8-bit words can be fetched from the
external VDRAM in one display line which is not enough to
display one complete display line with true 8-bit resolution.
Two methods of reducing data are available. One is simply
skipping the 8-bit to 6-bit (SKIP6, I2C-bus bit) and the other
is a small form of data reduction to come from 8-bit to 6-bit
(SMART6, I2C-bus bit). If both bits are set to logic 0 the
device is in true 8-bit resolution mode. For the twin PIP
mode the main channel is not placed in the VDRAM but in
an internal buffer, so still 8-bit resolution is achieved.
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