參數(shù)資料
型號(hào)： 935237510518
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PDSO20
封裝： 7.50 MM, PLASTIC, SO-20
文件頁(yè)數(shù)： 40/42頁(yè)
文件大?。?/td> 263K
代理商： 935237510518
1999 Jul 21
7
Philips Semiconductors
Product specication
Alignment-free multistandard vision and
FM sound IF-PLL demodulator
TDA9880
FUNCTIONAL DESCRIPTION
Figure 1 shows the simplified block diagram of the
integrated circuit. The integrated circuit comprises the
following functional blocks:
1. VIF amplifier
2. Tuner-AGC and VIF-AGC
3. VIF-AGC detector
4. Frequency Phase-Locked Loop (FPLL) detector
5. VCO and Travelling Wave Divider (TWD)
6. Digital acquisition help and AFC
7. Video demodulator and amplifier
8. Sound carrier trap
9. Intercarrier mixer
10. FM demodulator and acquisition help
11. Audio amplifier
12. Internal voltage stabilizer.
VIF amplier
The VIF amplifier consists of three AC-coupled differential
amplifier stages. Each differential stage comprises a
feedback network controlled by emitter degeneration.
Tuner-AGC and VIF-AGC
The AGC capacitor voltage is converted to an internal VIF
gain control signal, and is fed to the tuner AGC to generate
the tuner AGC output current at pin TAGC (open-collector
output). The tuner AGC takeover point can be adjusted
with RTOP. This allows the tuner to be matched to the SAW
filter in order to achieve the optimum IF input level.
VIF-AGC detector
The AGC detector generates the required VIF gain control
voltage for constant video output by charging or
discharging the AGC capacitor. Gain control is performed
by sync level detection. The newly developed AGC circuit
provides fast reaction time to cope with ‘a(chǎn)eroplane
fluttering’. The time constants for decreasing or increasing
gain are nearly equal.
Frequency Phase-Locked Loop (FPLL) detector
The VIF amplifier output signal is fed into a Frequency
Detector (FD) and into a Phase Detector (PD) via a limiting
amplifier. During acquisition the frequency detector
produces a DC current proportional to the frequency
difference between the input and the VCO signal.
After frequency lock-in the phase detector produces a DC
current proportional to the phase difference between the
VCO and the input signal. The DC current of either the
frequency detector or the phase detector is converted into
a DC voltage via the VIF-PLL filter, which controls the VCO
frequency.
VCO and Travelling Wave Divider (TWD)
The Resistor Capacitor (RC) VCO operates as an
integrated relaxation oscillator at double the picture carrier
frequency. The control voltage required to tune the VCO to
actually double the picture carrier frequency is generated
by the FPLL detector and fed via the loop filter to the VCO
control input terminal.
The oscillator signal is divided-by-two with a TWD which
generates two differential output signals with a 90 degrees
phase difference independent of the frequency.
Digital acquisition help and AFC
The integrated relaxation oscillator has a very wide
frequency range from approximately 30 to 70 MHz (after
the TWD). To prevent false locking of the FPLL and with
respect to the catching range of the frequency detector of
maximum
±2.5 MHz, the Digital Acquisition Help (DAH)
provides current into the loop filter until the VCO is in a
frequency window of
±2.3 MHz around the wanted VIF
frequency. In this case the analog operating FPLL will lock
the VCO to the VIF carrier and the acquisition help does
not provide any current to the loop filter.
The principle of the digital acquisition help is as follows:
the VCO is connected to a downcounter, which is preset
depending on the required VIF frequency. The counting
time, as well as the counter control, is derived from a
4 MHz reference signal. This signal can be supplied from
the internal 4 MHz crystal oscillator or from the 4 MHz
reference oscillator of an external tuning system.
The counting result after a counting cycle corresponds to
the actual VCO frequency.
The digital AFC is also derived from the counting result
after a counting cycle by digital-to-analog converting the
last four bits of the counter.
Video demodulator and amplier
The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in phase’ signal of the
travelling wave divider output.
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