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參數(shù)資料
| 型號： | 935235160118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48 |
| 文件頁數(shù)： | 19/20頁 |
| 文件大?。?/td> | 100K |
| 代理商： | 935235160118 |
2002 Oct 02
8
Philips Semiconductors
Product specication
16-bit D-type transparent latch with 5 V
tolerant inputs/outputs (3-state)
74LVC16373A;
74LVCH16373A
AC CHARACTERISTICS
GND = 0 V; tr =tf = 2.5 ns; CL = 50 pF; RL = 500 .
Note
1. Typical values are measured at VCC = 3.3 V and Tamb =25 °C.
SYMBOL
PARAMETER
WAVEFORMS
Tamb (°C)
UNIT
40 to +85
MIN.
TYP.
MAX.
VCC = 1.2 V
tPHL/tPLH
propagation delay Dn to Qn
see Figs 6 and 10
12
ns
tPHL/tPLH
propagation delay LE to Qn
see Figs 7 and 10
14
ns
tPZH/tPZL
3-state output enable time OE to Qn
see Figs 9 and 10
18
ns
tPHZ/tPLZ
3-state output enable time OE to Qn
see Figs 9 and 10
11
ns
tW
LE pulse width HIGH
see Fig.7
ns
tsu
set-up time Dn to LE
see Fig.8
ns
th
hold time Dn to LE
see Fig.8
ns
VCC = 2.7 V
tPHL/tPLH
propagation delay Dn to Qn
see Figs 6 and 10
1.5
5.7
ns
tPHL/tPLH
propagation delay LE to Qn
see Figs 7 and 10
1.5
5.8
ns
tPZH/tPZL
3-state output enable time OE to Qn
see Figs 9 and 10
1.5
6.5
ns
tPHZ/tPLZ
3-state output enable time OE to Qn
see Figs 9 and 10
1.5
6.4
ns
tW
LE pulse width HIGH
see Fig.7
3
ns
tsu
set-up time Dn to LE
see Fig.8
1.7
ns
th
hold time Dn to LE
see Fig.8
1.2
ns
VCC = 3.3 ±0.3 V; note1
tPHL/tPLH
propagation delay Dn to Qn
see Figs 6 and 10
1.5
3.0
4.7
ns
tPHL/tPLH
propagation delay LE to Qn
see Figs 7 and 10
1.5
3.4
4.8
ns
tPZH/tPZL
3-state output enable time OE to Qn
see Figs 9 and 10
1.5
3.5
5.5
ns
tPHZ/tPLZ
3-state output enable time OE to Qn
see Figs 9 and 10
1.5
3.9
5.4
ns
tW
LE pulse width HIGH
see Fig.7
3
2.0
ns
tsu
set-up time Dn to LE
see Fig.8
+1.7
0.1
ns
th
hold time Dn to LE
see Fig.8
1.2
0.1
ns
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