參數(shù)資料
型號： 935232410557
廠商： NXP SEMICONDUCTORS
元件分類： 數(shù)字信號處理
英文描述： 0-BIT, 28.6 MHz, OTHER DSP, PQFP80
封裝： 12 X 12 X 1.40 MM, PLASTIC, LQFP-80
文件頁數(shù)： 36/39頁
文件大?。?/td> 314K
代理商： 935232410557
1997 Jun 13
6
Philips Semiconductors
Preliminary specication
Digital Signal Processor (DSP) for
cameras
SAA8110G
VDDA(DC)
41
I
analog supply for analog core of triple DAC
VSSA(BG)
42
I
analog ground for to band gap
DECOUPL
43
O
pin to be used for external decoupling of band gap
RBIAS
44
O
external bias resistor connection for band gap
VDDA(BG)
45
I
analog supply for band gap
VDDD(P1)
46
I
digital supply 1 for CLK2 related peripherals
CLK2
47
I
output clock (CLK2 frequency is 2
× CLK1 frequency)
FIOUT
48
O
eld identication output pulse
VSYNCOUT
49
O
vertical synchronization output
HREF
50
O
horizontal reference output for YUV-port
CREF/PXQ
51
O
clock/pixel qualier output for YUV-port
LLC
52
O
line-locked system clock output
VSSD(P1)
53
I
digital ground 1 for CLK2 related peripherals
UV7
54
O
multiplex chrominance UV bit 7 (MSB)
UV6
55
O
multiplex chrominance UV bit 6
UV5
56
O
multiplex chrominance UV bit 5
UV4
57
O
multiplex chrominance UV bit 4
UV3
58
O
multiplex chrominance UV bit 3
UV2
59
O
multiplex chrominance UV bit 2
UV1
60
O
multiplex chrominance UV bit 1
UV0
61
O
multiplex chrominance UV bit 0 (LSB)
VDDD(P2)
62
I
digital supply for CLK2 related peripherals
Y7
63
O
luminance Y or multiplexed YUV bit 7 (MSB)
Y6
64
O
luminance Y or multiplexed YUV bit 6
Y5
65
O
luminance Y or multiplexed YUV bit 5
Y4
66
O
luminance Y or multiplexed YUV bit 4
Y3
67
O
luminance Y or multiplexed YUV bit 3
Y2
68
O
luminance Y or multiplexed YUV bit 2
Y1
69
O
luminance Y or multiplexed YUV bit 1
Y0
70
O
luminance Y or multiplexed YUV bit 0 (LSB)
VSSD(P2)
71
I
digital ground 2 for to CLK2 related peripherals
VDDD(C3)
72
I
digital supply 3 for digital core and CLK1 related peripherals
A1/SNRES
73
I
I2C-bus address select pin A1 or SNERT reset input
A0/SNDA
74
I
I2C-bus address select pin A0 or SNERT data input/output
SDA
75
I
I2C-bus data input/output
VSSD(C3)
76
I
digital ground 3 for digital core and CLK1 related peripherals
SCL/SNCL
77
I
I2C-bus clock/SNERT clock input
VSSD(C4)
78
I
digital ground 4 for digital core and CLK1 related peripherals
XIN
79
I
input crystal oscillator for subcarrier lock applications
XOUT
80
O
output crystal oscillator for subcarrier lock applications
SYMBOL
PIN
I/O
DESCRIPTION
相關(guān)PDF資料
PDF描述
935232410518 0-BIT, 28.6 MHz, OTHER DSP, PQFP80
935256670557 0-BIT, 28.6 MHz, OTHER DSP, PQFP80
0711 35 A, MODULAR TERMINAL BLOCK
0715 30 A, MODULAR TERMINAL BLOCK
0717238 65 A, STRIP TERMINAL BLOCK, 1 ROW, 1 DECK
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