參數(shù)資料
型號: 935232410518
廠商: NXP SEMICONDUCTORS
元件分類: 數(shù)字信號處理
英文描述: 0-BIT, 28.6 MHz, OTHER DSP, PQFP80
封裝: 12 X 12 X 1.40 MM, PLASTIC, LQFP-80
文件頁數(shù): 38/39頁
文件大小: 314K
代理商: 935232410518
1997 Jun 13
8
Philips Semiconductors
Preliminary specication
Digital Signal Processor (DSP) for
cameras
SAA8110G
FUNCTIONAL DESCRIPTION
Black offset preprocessing
The input data is clamped within the optical black pixel
area of the CCD. The size of the digital clamp window is
16 pixels by 128 lines (i.e. TDA8786). It is possible to
differentiate black levels for odd/even lines, pixels and
fields. This comes in addition to the analog preprocessing
clamp which is active on the clamp pulse generated by the
external timing circuit. The analog clamp is included in the
TDA8786.
RGB separation
PAL/NTSC sensors generate interlaced data adding offset
in the complementary colour pixels. The RGB separation
block with its two line memories generates the three
components Y, 2R
G, and 2B G for each input data
corresponding to a pixel value of the CCD. Then the
triplet R, G, B is derived. This block also delivers some
contour and white clip information.
RGB processing
The RGB processing includes several features:
Colour space matrix depending on CCD type to be
suitable with different sensor colour filters
Gain correction for R and B signals for white balance
control
Black offset
Adjustable knee
Adjustable gamma function.
The knee function is applied to all three RGB signals.
Its shape is continuously adjustable by changing the slope
and the knee offset point.
To compensate for the non-linear response of display
devices, a gamma correction is applied to R, G and B
signals. It may be adjustable from linear to a 0.35 power
coefficient.
Fig.3 RGB separation diagram.
handbook, full pagewidth
MGK153
LINE
MEMORY
LINE
MEMORY
R
G
B
CCD inputs
white clip
vertical contour
RGB
COLOUR
SEPARATION
10
Fig.4 RGB processing.
handbook, full pagewidth
MGK154
COLOUR
MATRIX
R
Rgain
Rblack
Gblack
G
B
3
×
KNEE
R
G
B
+
×
+
Bgain
Bblack
×
+
3
×
GAMMA
相關(guān)PDF資料
PDF描述
935256670557 0-BIT, 28.6 MHz, OTHER DSP, PQFP80
0711 35 A, MODULAR TERMINAL BLOCK
0715 30 A, MODULAR TERMINAL BLOCK
0717238 65 A, STRIP TERMINAL BLOCK, 1 ROW, 1 DECK
0717 20 A, MODULAR TERMINAL BLOCK
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