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參數(shù)資料
| 型號： | 935205840518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | DAC |
| 英文描述： | TRIPLE, PARALLEL, 8 BITS INPUT LOADING, 0.05 us SETTLING TIME, 8-BIT DAC, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 21/23頁 |
| 文件大?。?/td> | 154K |
| 代理商： | 935205840518 |
1996 Jan 25
7
Philips Semiconductors
Product specication
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDA8771A
CHARACTERISTICS
VDDA =VDDD = 4.5 to 5.5 V; VSSA and VSSD shorted together; VDDA VDDD = 0.5 to +0.5 V; Tamb = 0 to 70 °C;
typical values measured at VDDA =VDDD = 5 V and Tamb =25 °C; unless otherwise specied.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDDA
analog supply voltage
4.5
5.0
5.5
V
VDDD
digital supply voltage
4.5
5.0
5.5
V
IDDA
analog supply current
RL =1k; note 1
10
33
45
mA
IDDD
digital supply current
fclk = 35 MHz
720
mA
Inputs
CLOCK INPUT (PIN 31)
VIL
LOW level input voltage
0
1.2
V
VIH
HIGH level input voltage
2.0
VDDD
V
R, G, B DIGITAL INPUTS (PINS 12 TO 8, 5 TO 3, 20 TO 13, 30, 29 AND 26 TO 21)
VIL
LOW level input voltage
0
1.2
V
VIH
HIGH level input voltage
2.0
VDDD
V
IREF REFERENCE CURRENT INPUT FOR OUTPUT BUFFERS (PIN 1)
II
input current
0.6
0.7
mA
Timing; see Fig.3
fclk(max)
maximum clock frequency
35
MHz
tCPH
clock pulse width HIGH
8
ns
tCPL
clock pulse width LOW
8
ns
tr
clock rise time
5ns
tf
clock fall time
6ns
tSU;DAT
input data set-up time
4
ns
tHD;DAT
input data hold time
4
ns
Voltage reference (pin 33, referenced to VSSA)
VREF
output reference voltage
1.180
1.242
1.305
V
Outputs
OUTB, OUTR, OUTG ANALOG OUTPUTS (PINS 36, 44 AND 40, REFERENCED TO V
SSA) FOR 1k LOAD; see Table 1
FSR
full-scale output voltage range
2.80
2.95
3.10
V
Vos
offset of analog voltage output
0.25
V
VOmax
maximum output voltage
data inputs = logic 1;
note 2
2.95
3.20
3.45
V
VOmin
minimum output voltage
data inputs = logic 0;
note 2
0.05
0.25
0.45
V
THD
total harmonic distortion
fi = 4.43 MHz;
fclk = 35 MHz
44
dB
ZL
output load impedance
0.9
1.0
1.1
k
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