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參數(shù)資料
| 型號： | 935193790112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP56 |
| 封裝： | 0.600 INCH, PLASTIC, SOT-400, SDIP-56 |
| 文件頁數(shù)： | 20/75頁 |
| 文件大小： | 522K |
| 代理商： | 935193790112 |
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1997 Jul 01
27
Philips Semiconductors
Preliminary specication
I2C-bus controlled economy PAL/NTSC
and NTSC TV-processors
TDA837x family
CHARACTERISTICS
VP =8V; Tamb =25 °C; the pin numbers given refer to the SDIP56 package; unless otherwise specied.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
MAIN SUPPLY (PIN 12)
VP1
supply voltage
7.2
8.0
8.8
V
IP1
supply current
110
mA
Ptot
total power dissipation
900
mW
HORIZONTAL OSCILLATOR SUPPLY (PIN 37)
VP2
supply voltage
7.2
8.0
8.8
V
IP2
supply current
6
mA
IF circuit
VISION IF AMPLIFIER INPUTS (PINS 48 AND 49)
Vi(rms)
input sensitivity (RMS value)
note 1
fi = 38.90 MHz
70
100
V
fi = 45.75 MHz
70
100
V
fi = 58.75 MHz
70
100
V
Ri
input resistance (differential)
note 2
2
k
Ci
input capacitance (differential)
note 2
3
pF
G
v
voltage gain control range
64
dB
Vi(max)(rms)
maximum input signal
(RMS value)
100
150
mV
PLL DEMODULATOR (PLL FILTER ON PIN 5); note 3
fPLL
PLL frequency range
32
60
MHz
fcr(PLL)
PLL catching range
2
MHz
tacq(PLL)
PLL acquisition time
20
ms
f
VCO(T)
VCO frequency variation with
temperature
note 4
tbf
kHz/K
ftune(VCO)
VCO tuning range
via the I2C-bus
2.5
MHz
f
DAC
frequency variation per step of
the DAC (A0 to A6)
20
kHz
fshift(L’)
frequency shift with the L’ FA bit
5.5
MHz
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