參數(shù)資料
型號： 935189420118
廠商： NXP SEMICONDUCTORS
元件分類： 總線收發(fā)器
英文描述： HC/UH SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
封裝： PLASTIC, SSOP-24
文件頁數(shù)： 3/9頁
文件大小： 88K
代理商： 935189420118
92
XMEGA E5 [DATASHEET]
8153G–AVR–10/2013
Notes:
1.
Required only for fSCL > 100kHz.
2.
Cb = Capacitance of one bus line in pF.
3.
fPER = Peripheral clock frequency.
tLOW
Low period of SCL Clock
fSCL ≤ 100kHz
4.7
s
fSCL ≤ 400kHz
1.3
fSCL ≤ 1MHz
0.5
tHIGH
High period of SCL Clock
fSCL ≤ 100kHz
4
s
fSCL ≤ 400kHz
0.6
fSCL ≤ 1MHz
0.26
tSU;STA
Set-up time for a repeated START
condition
fSCL ≤ 100kHz
4.7
s
fSCL ≤ 400kHz
0.6
fSCL ≤ 1MHz
0.26
tHD;DAT
Data hold time
fSCL ≤ 100kHz
0
3.45
s
fSCL ≤ 400kHz
0
0.9
fSCL ≤ 1MHz
0
0.45
tSU;DAT
Data setup time
fSCL ≤ 100kHz
250
ns
fSCL ≤ 400kHz
100
fSCL ≤ 1MHz
50
tSU;STO
Setup time for STOP condition
fSCL ≤ 100kHz
4
s
fSCL ≤ 400kHz
0.6
fSCL ≤ 1MHz
0.26
tBUF
Bus free time between a STOP and
START condition
fSCL ≤ 100kHz
4.7
s
fSCL ≤ 400kHz
1.3
fSCL ≤ 1MHz
0.5
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
相關PDF資料
PDF描述
933715620653 HCT SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO20
933715620652 HCT SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO20
933715510653 HC/UH SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO20
933839600005 HCT SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, UUC
933835610005 HC/UH SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, UUC
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