參數資料
型號： 935189190118
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
封裝： 5.30 MM, PLASTIC, MO-150AC, SOT-338-1, SSOP-16
文件頁數： 14/15頁
文件大?。?/td> 92K
代理商： 935189190118
1998 Jun 10
8
Philips Semiconductors
Product specication
Dual JK ip-op with set and reset;
negative-edge trigger
74HC/HCT112
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
SYMBOL
PARAMETER
Tamb (°C)
TEST CONDITIONS
74HCT
UNIT
VCC
(V)
WAVEFORMS
+25
40 to +85
40 to +125
min.
typ.
max.
min.
max.
min.
max.
tPHL/ tPLH
propagation delay
nCP to nQ
21
35
44
53
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
nCP to nQ
23
40
50
60
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
nRD to nQ, nQ
22
37
46
56
ns
4.5
Fig.7
tPHL/ tPLH
propagation delay
nSD to nQ, nQ
18
32
40
48
ns
4.5
Fig.7
tTHL/ tTLH
output transition time
7
15
19
22
ns
4.5
Fig.6
tW
clock pulse width
HIGH or LOW
16
8
20
24
ns
4.5
Fig.6
tW
set or reset pulse width
LOW
18
10
23
27
ns
4.5
Fig.7
trem
removal time
nRD to nCP
20
11
25
30
ns
4.5
Fig.7
trem
removal time
nSD to nCP
20
8
25
30
ns
4.5
Fig.7
tsu
set-up time
nJ, nK to nCP
16
7
20
24
ns
4.5
Fig.6
th
hold time
nJ, nK to nCP
0
7
0
ns
4.5
Fig.6
fmax
maximum clock pulse
frequency
30
64
24
20
MHz
4.5
Fig.6
相關PDF資料
PDF描述
933714500653 HC/UH SERIES, 9-BIT ENCODER, PDSO16
933669310652 HC/UH SERIES, 9-BIT ENCODER, PDIP16
935189670112 HC/UH SERIES, 9-BIT ENCODER, PDSO16
933824340005 HC/UH SERIES, 9-BIT ENCODER, UUC
935189670118 HC/UH SERIES, 9-BIT ENCODER, PDSO16
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