參數(shù)資料
型號： 935174930112
廠商： NXP SEMICONDUCTORS
元件分類： 計(jì)數(shù)器
英文描述： HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16
封裝： PLASTIC, SSOP-16
文件頁數(shù)： 5/7頁
文件大?。?/td> 46K
代理商： 935174930112
December 1990
5
Philips Semiconductors
Product specication
12-stage binary ripple counter
74HC/HCT4040
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
40 to +85
40 to +125
min.
typ.
max.
min.
max.
min.
max.
tPHL/ tPLH propagation delay
CP to Q0
47
17
14
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.7
tPHL/ tPLH propagation delay
Qn to Qn+1
28
10
8
100
20
17
125
25
21
150
30
26
ns
2.0
4.5
6.0
Fig.7
tPHL
propagation delay
MR to Qn
61
22
18
185
37
31
230
46
39
280
56
48
ns
2.0
4.5
6.0
Fig.7
tTHL/ tTLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.7
tW
clock pulse width
HIGH or LOW
80
16
14
5
4
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.7
tW
master reset pulse
width; HIGH
80
16
14
22
8
6
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.7
trem
removal time
MR to CP
50
10
9
8
3
2
65
13
11
75
15
13
ns
2.0
4.5
6.0
Fig.7
fmax
maximum clock pulse
frequency
6.0
30
35
27
82
98
4.8
24
28
4.0
20
24
MHz
2.0
4.5
6.0
Fig.7
相關(guān)PDF資料
PDF描述
933715260653 HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16
933824690005 HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, UUC
935189100112 HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16
935189380118 HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16
935174920112 HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16
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