參數(shù)資料
型號(hào)： 935089010518
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 16 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁(yè)數(shù)： 24/112頁(yè)
文件大?。?/td> 693K
代理商： 935089010518
1996 Jun 27
19
Philips Semiconductors
Product specication
8-bit microcontroller with on-chip CAN
P8xC592
10.1
ADC Control register (ADCON)
Table 13 ADC Control register (address C5H)
Table 14 Description of the ADCON bits
Table 15 ADCI and ADCS operating modes
If ADCI is cleared by software while ADCS is set at the same time a new analog-to-digital conversion with the same
channel-number may be started. It is recommended to reset ADCI before ADCS is set.
Note
1. Start of a new conversion requires ADCI = 0.
76543210
ADC.1
ADC.0
ADEX
ADCI
ADCS
AADR2
AADR1
AADR0
BIT SYMBOL
FUNCTION
7
ADC.1
Bit 1 of ADC converted value.
6
ADC.0
Bit 0 of ADC converted value.
5
ADEX
Enable external start of conversion by STADC. If ADEX is:
LOW, then conversion cannot be started externally by STADC (only by software by setting ADCS)
HIGH, then conversion can be started externally by a rising edge on STADC or externally.
4
ADCI
ADC interrupt ag. This ag is set when an analog-to-digital conversion result is ready to be read.
If enabled, an interrupt is invoked. The ag must be cleared by software.
It cannot be set by software (see Table 15).
3
ADCS
ADC start and status. Setting this bit starts an analog-to-digital conversion. It may be set by
software or by the external signal STADC. The ADC logic ensures that this signal is HIGH while the
ADC is busy. On completion of the conversion, ADCS is reset at the same time the interrupt ag
ADCI is set. ADCS can not be reset by software (see Table 15).
2
AADR2
Analog input select. This binary coded address selects one of the eight analog port pins of P5 to be
input to the converter. It can only be changed when ADCI and ADCS are both LOW. AADR2 is the
MSB. (e.g. 100B selects the analog input channel ADC4)
1
AADR1
0
AADR0
ADCI
ADCS
OPERATION
0
ADC not busy, a conversion can be started.
0
1
ADC busy, start of a new conversion is blocked.
1
X (don’t care)
Conversion completed; see note 1.
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