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參數(shù)資料
| 型號： | 935053480518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 音頻控制 |
| 英文描述： | 2 CHANNEL(S), EQUALIZER CIRCUIT, PDSO32 |
| 封裝： | PLASTIC, SO-32 |
| 文件頁數(shù)： | 15/19頁 |
| 文件大小： | 212K |
| 代理商： | 935053480518 |
May 1991
5
Philips Semiconductors
Preliminary specication
5-band stereo equalizer circuit
TEA6360
FUNCTIONAL DESCRIPTION
The TEA6360 is performed with two stereo channels
(RIGHT and LEFT), each one consists of five equal filter
amplifiers (Fig.1).
The centre frequencies for the different filters as well as
the bandwidth and the control ranges for boost and cut
depend on the external components. Each filter can have
different external components but for one definite pair of
filters the centre frequency as well as the control range for
boost and cut are the same. That means, they have
symmetrical curves for boost and cut.
The control range (maximum value in dB) is divided into
five steps and one extra step for the linear position.
At maximum gain of 12 dB the typical step resolution is
2.4 dB. The internal resistor chain of each filter amplifier is
optimized for 12 dB maximum gain. Therefore the typical
gain factors for 15 dB application are as follows:
The control of the different filters is obtained by selecting
the appropriate subaddress byte (Table 1).
step 1
= 2.7
dB
step 2
= 5.5
dB
step 3
= 8.4
dB
step 4
= 11.6
dB
step 5
= 15.0
dB
The position of the filter in the left channel and that in the
right channel is always the same (stereo).
The position of the boost part and the cut part is
independently controllable (Tables 2 and 3).
The quality factor of the filter has its maximum in the
maximum position (steps 5), if boost (cut on step 0) or cut
(boost on step 0) is used. The quality factor decreases also
with the step number (variable quality factor).
In this mode the control pattern are according to Table 4.
A different control is necessary to achieve a constant
quality factor over the whole control range. For boost with
a constant quality factor over the boost range position
+5
is selected and boost control is then performed using cut.
This control technique is applied to the cut range with
position
5 selected and the boost is varied (Table 5).
The cut part has to follow the boost part in each filter for
economic reasons. So the signal is first amplified and then
attenuated. This has to be taken into account for the
internal level diagram in case of constant quality factor.
This may result in a mode between constant Q and
non-constant Q mode; for example for the position
+2 it is
not necessary to amplify by step
+5 and then attenuate by
3 step. The combination of step +4 and step 2 to reach
position
+2 is a good result (quasi constant quality factor,
Table 6).
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
Ground pins 19, 28 and 43 connected together.
Note
1. Equivalent to discharging a 200 pF capacitor through a 0
series resistor.
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VP
supply voltage (pin 14)
0
13.2
V
Vn
voltage on all pins, grounds excluded
0
VP
V
Ptot
total power dissipation
0
500
mW
Tstg
storage temperature range
40
150
°C
storage temperature range
40
150
°C
Tamb
operating ambient temperature range
40
85
°C
VESD
electrostatic handling(1) for all pins
±500
V
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