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參數(shù)資料
| 型號： | 935025610602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 門電路 |
| 英文描述： | F/FAST SERIES, QUAD 2-INPUT NAND GATE, PDSO16 |
| 封裝： | 3.90 MM, PLASTIC, SOT-108-1, SO-14 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 77K |
| 代理商： | 935025610602 |
Philips Semiconductors
Product specification
74F30
8-input NAND gate
March 3, 1989
4
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS1
MIN
TYP2
MAX
UNIT
VO
High level output voltage
VCC = MIN, VIL = MAX
±10%VCC
2.5
V
VOH
High-level output voltage
VIH = MIN, IOH = MAX
±5%VCC
2.7
3.4
V
VO
Low level output voltage
VCC = MIN, VIL = MAX
±10%VCC
0.30
0.50
V
VOL
Low-level output voltage
VIH = MIN, IOL = MAX
±5%VCC
0.30
0.50
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
–1.2
V
II
Input current at maximum input voltage
VCC = MAX, VI = 7.0V
100
A
IIH
High-level input current
VCC = MAX, VI = 2.7V
20
A
IIL
Low-level input current
VCC = MAX, VI = 0.5V
–0.6
mA
IOS
Short-circuit output current3
VCC = MAX
–60
–150
mA
ICC
Supply current (total)
ICCH
VCC = MAX
VIN = GND
0.6
1.5
mA
ICC
Supply current (total)
ICCL
VCC = MAX
VIN = 4.5V
2.8
4.0
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
SYMBOL
PARAMETER
TEST
CONDITION
Tamb = +25°C
Tamb = 0°C to +70°C
UNIT
CONDITION
CL = 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay
Da, Db, Dc, Dd, De, Df, Dg, Dh to Q
Waveform 1
1.5
1.0
3.5
3.0
5.0
4.5
1.5
1.0
5.5
5.0
ns
AC WAVEFORMS
VM
Q
Da, Db, Dc, Dd,
De, Df, Dg, Dh
tPHL
tPLH
SF00074
Waveform 1.
Propagation Delay for Inverting Outputs
NOTE:
For all waveforms, VM = 1.5V.
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