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參數(shù)資料
| 型號： | 933968320518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 31/34頁 |
| 文件大小： | 250K |
| 代理商： | 933968320518 |
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Philips Semiconductors
Product specification
SCC2692
Dual asynchronous receiver/transmitter (DUART)
1998 Sep 04
6
DC ELECTRICAL CHARACTERISTICS1, 2, 3
SYM-
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
BOL
PARAMETER
TEST CONDITIONS
Min
Typ
Max
UNIT
VIL
Input low voltage
0.8
V
VIH
Input high voltage (except X1/CLK)6
2.0
V
VIH
Input high voltage (except X1/CLK)7
2.5
V
VIH
Input high voltage (X1/CLK)
0.8 VCC
V
VOL
Output low voltage
IOL = 2.4mA
0.4
V
VOH
Output high voltage (except OD outputs)4
IOH = -400A
VCC -0.5
V
IIX1PD
X1/CLK input current - power down
VIN = 0 to VCC
-10
+10
A
IILX1
X1/CLK input low current - operating
VIN = 0
-75
0
A
IIHX1
X1/CLK input high current - operating
VIN = VCC
0
75
A
IOHX2
X2 output high current - operating
VOUT = VCC, X1 = 0
0
+75
A
IOHX2S
X2 output high short circuit current - operating
VOUT = 0, X1 = 0
-10
-1
mA
IOLX2
X2 output low current - operating
VOUT = 0, X1 = VCC
-75
0
A
IOLX2S
X2 output low short circuit current - operating and power down
VOUT = VCC, X1 = VCC
1
10
mA
Input leakage current:
II
All except input port pins
VIN = 0 to VCC
-10
+10
A
Input port pins
VIN = 0 to VCC
-20
+10
A
IOZH
Output off current high, 3-state data bus
VIN = VCC
10
A
IOZL
Output off current low, 3-state data bus
VIN = 0V
-10
A
IODL
Open-drain output low current in off-state
VIN = 0
-10
A
IODH
Open-drain output high current in off-state
VIN = VCC
10
A
Power supply current5
ICC
Operating mode
CMOS input levels
10
mA
Power down mode8
CMOS input levels
2
10
mA
NOTES:
1. Parameters are valid over specified temperature range.
2. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4V and 2.4V with a transition time of 5ns
maximum. For X1/CLK this swing is between 0.4V and 4.4V. All time measurements are referenced at input voltages of 0.8V and 2.0V and
output voltages of 0.8V and 2.0V, as appropriate.
3. Typical values are at +25
°C, typical supply voltages, and typical processing parameters.
4. Test conditions for outputs: CL = 150pF, except interrupt outputs. Test conditions for interrupt outputs: CL = 50pF, RL = 2.7K to VCC.
5. All outputs are disconnected. Inputs are switching between CMOS levels of VCC -0.2V and VSS + 0.2V.
6. TA > 0°C
7. TA < 0°C
8. See UART application note for 5
A.
AC CHARACTERISTICS1, 2, 4
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
Min
Typ3
Max
UNIT
Reset Timing (See Figure 3)
tRES
RESET pulse width
200
ns
Bus Timing5 (See Figure 4)
tAS
A0-A3 setup time to RDN, WRN Low
10
ns
tAH
A0-A3 hold time from RDN, WRN Low
100
ns
tCS
CEN setup time to RDN, WRN Low
0
ns
tCH
CEN hold time from RDN, WRN High
0
ns
tRW
WRN, RDN pulse width
225
ns
tDD
Data valid after RDN Low
175
ns
tDA
RDN Low to data bus active7
15
ns
tDF
Data bus floating after RDN High
125
ns
tDI
RDN High to data bus invalid7
20
ns
tDS
Data setup time before WRN High
100
ns
tDH
Data hold time after WRN High
20
ns
tRWD
High time between reads and/or writes5, 6
200
ns
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