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參數(shù)資料
| 型號： | 933876960118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 算術(shù)邏輯單元 |
| 英文描述： | F/FAST SERIES, 4-BIT ADDER/SUBTRACTOR, PDSO16 |
| 封裝： | 3.90 MM, PLASTIC, MS-012, SOT-109-1, SO-16 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 120K |
| 代理商： | 933876960118 |
Philips Semiconductors
Product specification
74F583
4-bit BCD adder
2
1989 Apr 06
853–1245 96263
FEATURES
Adds two decimal numbers
Full internal look-ahead
Fast ripple carry for economical expansion
Sum output delay 19.5 ns max.
Ripple carry delay 8.5 ns max.
Input to ripple delay 13.0 ns max.
Supply current 60 mA max.
DESCRIPTION
The 74F583 4-bit coded (BCD) full adder performs the addition of
two decimal numbers (A0–A3, B0–B3). The look-ahead generates
BCD carry terms internally, allowing the 74F583 to then do BCD
addition correctly. For BCD numbers 0 through 9 at A and B inputs,
the BCD sum forms at the output.
In addition of two BCD numbers totalling a number greater than 9, a
valid BCD number and carry will result. For input values larger than
9, the number is converted from binary to BCD. Binary to BCD
conversion occurs by grounding one set of inputs, An or Bn, and
applying a 4-bit binary number to the other set of inputs. If the input
is between 0 and 9, a BCD number occurs at the output. If the
binary input falls between 10 and 15, a carry term is generated. Both
the carry term and the sum are the BCD equivalent of the binary
input. Converting binary numbers greater than 16 may be achieved
by cascading 74F583s.
PIN CONFIGURATION
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
B1
B2
B3
A3
Cn
Cn+4
S2
GND
VCC
A2
A1
A0
B0
S0
S1
S3
SF01436
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F583
9.0 ns
45 mA
ORDERING INFORMATION
PACKAGE
COMMERCIAL RANGE
VCC = 5 V ±10%
Tamb = 0°C to +70°C
DRAWING
NUMBER
16-pin plastic DIP
N74F583N
SOT38-4
16-pin plastic SO
N74F583D
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH / LOW
LOAD VALUE
HIGH / LOW
A0–A3
A operand inputs
1.0 / 2.0
20
A / 1.2 mA
B0–B3
B operand inputs
1.0 / 2.0
20
A / 1.2 mA
Cn
Carry input
1.0 / 1.0
20
A / 0.6 mA
Cn+4
Carry output
50 / 33
1.0 mA / 20 mA
S0–S3
Sum outputs
50 / 33
1.0 mA / 20 mA
NOTE:
One (1.0) FAST Unit Load is defined as 20
A in the High state and 0.6 mA in the Low state.
LOGIC SYMBOL
A0
B0
A1
B1
A2
B2
A3
B3
S0
S1
S2
S3
3
4
2
15
1
14
12
13
11
10
7
9
Cn
Cn+4
6
5
VCC = Pin 16
GND = Pin 8
SF01437
LOGIC SYMBOL (IEEE/IEC)
13
14
15
4
12
1
2
3
5
11
10
7
9
6
0
3
CO
CI
0
3
0
3
Σ
P
Q
Σ (BCD)
SF01438
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