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參數(shù)資料
| 型號(hào)： | 933876860602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, SOT-38-4, DIP-16 |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 88K |
| 代理商： | 933876860602 |
Philips Semiconductors
Product specification
74F173
Quad D-type flip–flop (3-State)
August 31, 1990
5
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
NOM
MAX
VCC
Supply voltage
4.5
5.0
5.5
V
VIH
High–level input voltage
2.0
V
VIL
Low–level input voltage
0.8
V
IIk
Input clamp current
–18
mA
IOH
High–level output current
–15
mA
IOL
Low–level output current
48
mA
Tamb
Operating free air temperature range
0
+70
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
LIMITS
UNIT
CONDITIONS1
MIN
TYP2
MAX
VCC = MIN, VIL = MAX,
±10%VCC
2.4
V
VOH
High-level output voltage
VIH = MIN, IOH = MAX
±5%VCC
2.7
3.4
V
VCC = MIN, VIL = MAX,
±10%VCC
2.0
V
VIH = MIN, IOH = –15mA
±5%VCC
2.0
3.1
V
VOL
Low-level output voltage
VCC = MIN, VIL = MAX,
±10%VCC
0.35
0.50
V
VIH = MIN, IOL = MAX
±5%VCC
0.35
0.50
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
-1.2
V
II
Input current at maximum input voltage
VCC = MAX, VI = 7.0V
100
A
IIH
High–level input current
VCC = MAX, VI = 2.7V
20
A
IIL
Low–level input current
VCC = MAX, VI = 0.5V
–0.6
mA
IOZH
Off–state output current, high–level voltage applied
VCC = MAX, VO = 2.7V
50
A
IOZL
Off–state output current, low–level voltage applied
VCC = MAX, VO = 0.5V
–50
A
IOS
Short–circuit output current3
VCC = MAX
-60
-150
mA
ICCH
19
26
mA
ICC
Supply current (total)
ICCL
VCC = MAX
27
37
mA
ICCZ
23
32
mA
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
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