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參數(shù)資料
| 型號： | 933861410512 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | F/FAST SERIES, 9 1-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 89K |
| 代理商： | 933861410512 |
Philips Semiconductors
Product specification
74F862, 74F863
Bus transceivers (3-State)
2000 Mar 24
6
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS1
MIN
TYP2
MAX
UNIT
VCC = MIN,
VIL = MAX
IO =1 mA
±10%VCC
2.4
V
VO
High level output voltage
VIL = MAX,
VIH = MIN
IOH = –1 mA
±5%VCC
2.4
3.3
V
VOH
High-level output voltage
VCC = MIN,
VIL = MAX
IO =24 mA
±10%VCC
2.0
V
VIL = MAX,
VIH = MIN
IOH = –24 mA
±5%VCC
2.0
V
VO
Low level output voltage
VCC = MIN,
VIL = MAX
IOL = –48 mA
±10%VCC
0.38
0.55
V
VOL
Low-level output voltage
VIL = MAX,
VIH = MIN
IOL = 64 mA
±5%VCC
0.42
0.55
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
–1.2
V
II
Input current at
maximum input voltage
OEAB, OEBA
OEABn, OEBAn
VCC = 0.0 V, VI = 7.0 V
100
A
I
maximum input voltage
An, Bn
VCC = 5.5 V, VI = 5.5 V
1
mA
IIH
High-level input current
VCC = MAX, VI = 2.7 V
20
A
IIL
Low-level input current
VCC = MAX, VI = 0.5 V
–20
A
IIH + IOZH
Off-state output current
High-level voltage applied
A
B
VCC = MAX, VO = 2.7 V
70
A
IIL + IOZL
Off-state output current
Low-level voltage applied
An, Bn
VCC = MAX, VO = 0.5 V
–70
A
IOS
Short-circuit output current3
VCC = MAX
–100
–225
mA
ICCH
145
195
mA
An, Bn
74F863
ICCL
VCC = MAX
140
195
mA
ICCZ
165
220
mA
ICC
Supply current total
ICCH
90
130
mA
74F862
ICCL
VCC = MAX
120
170
mA
ICCZ
130
160
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5 V, Ta = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
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