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參數(shù)資料
| 型號： | 933828960623 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)移位寄存器 |
| 英文描述： | F/FAST SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO20 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 148K |
| 代理商： | 933828960623 |
Philips Semiconductors
Product data
74F299
8-bit universal shift/storage register (3-State)
2003 Feb 05
6
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted.
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS1
MIN
TYP2
MAX
UNIT
Q0 Q7
IO =1 mA
±10%VCC
2.5
V
VO
HIGH level output voltage
Q0, Q7
VCC = MIN,
V
MAX
IOH = –1 mA
±5%VCC
2.7
3.4
V
VOH
HIGH-level output voltage
I/On
VIL = MAX,
VIH = MIN
IO =3 mA
±10%VCC
2.4
V
I/On
IH
IOH = –3 mA
±5%VCC
2.7
3.3
V
VO
LOW level output voltage
VCC = MIN,
V
MAX
IO = MAX
±10%VCC
0.35
0.50
V
VOL
LOW-level output voltage
VIL = MAX,
VIH = MIN
IOL = MAX
±5%VCC
0.35
0.50
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
–1.2
V
II
Input current at maximum
others
VCC = MAX, VI = 7.0 V
100
A
In ut current at maximum
input voltage
I/On
VCC = 5.5V, VI = 5.5 V
1
mA
IIH
HIGH-level input current
except
I/On
VCC = MAX, VI = 2.7 V
20
A
I
LOW level input current
S0, S1
VCC = MAX V =0 5V
–1.2
mA
IIL
LOW-level input current
others
VCC = MAX, VI = 0.5 V
–0.6
mA
IIH + IOZH
Off-state output current,
HIGH-level voltage applied
I/On
VCC = MAX, VO = 2.7 V
70
A
IIL + IOZL
Off-state output current
LOW-level voltage applied
I/On
only
VCC = MAX, VO = 0.5 V
–0.6
mA
IOS
Short-circuit output current3
VCC = MAX
–60
–150
mA
ICCH
55
60
mA
ICC
Supply current (total)
ICCL
VCC = MAX
70
90
mA
ICCZ
65
95
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5 V, Tamb = 25 °C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a HIGH output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
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