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參數(shù)資料
| 型號(hào)： | 933768910602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, SOT-38-4, DIP-16 |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 91K |
| 代理商： | 933768910602 |
Philips Semiconductors
Product specification
74F378
Hex D flip-flop with enable
1989 Oct 05
5
AC ELECTRICAL CHARACTERISTICS
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
fMAX
Maximum clock frequency
Waveform 1
80
100
80
MHz
tPLH
tPHL
Propagation delay
CP to Qn
Waveform 1
3.0
3.5
5.5
6.0
7.5
8.5
3.0
3.5
8.5
9.5
ns
AC SETUP REQUIREMENTS
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500
CL= 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
ts (H)
ts (L)
Setup time, High or Low
Dn to CP
Waveform 2
4.0
ns
th (H)
th (L)
Hold time, High or Low
Dn to CP
Waveform 2
0
ns
ts (H)
ts (L)
Setup time, High or Low
E to CP
Waveform 2
4.0
10.0
4.0
10.0
ns
th (H)
th (L)
Hold time, High or Low
E to CP
Waveform 2
0
ns
tw (H)
tw (L)
CP Pulse width,
High or Low
Waveform 1
4.0
6.0
4.0
6.0
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
tPLH
CP
VM
tw(H)
1/fMAX
VM
tw(L)
tPHL
Qn
SF00919
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
VM
ts(H)
ts(L)
En
CP
SF00920
th=0
VM
ts
th
Dn
Waveform 2. Data and Enable Setup Time and Hold Times
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