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參數(shù)資料
| 型號： | 933756970118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)器 |
| 英文描述： | HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP BINARY COUNTER, PDSO14 |
| 封裝： | PLASTIC, SO-14 |
| 文件頁數(shù)： | 7/7頁 |
| 文件大?。?/td> | 43K |
| 代理商： | 933756970118 |
December 1990
7
Philips Semiconductors
Product specication
4-bit binary ripple counter
74HC/HCT93
AC WAVEFORMS
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”.
Fig.6
Waveforms showing the clock (CPn) to output (Qn) propagation delays, the clock pulse width, output
transition times and the maximum clock pulse frequency.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7
Waveforms showing the master reset (MRn) pulse width, the master reset to output (Qn) propagation
delays and the master reset to clock (CPn) removal time.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
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