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參數(shù)資料
| 型號： | 933738320602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | ADDR LATCH BASED PRPHL DRVR, PDSO16 |
| 封裝： | 7.50 MM, PLASTIC, SOT162-1, MS-013, SO-16 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 123K |
| 代理商： | 933738320602 |
Philips Semiconductors
Product data
NE/SA5090
Addressable relay driver
2
2001 Aug 03
853-0892 26833
DESCRIPTION
The NE/SA5090 addressable relay driver is a high-current latched
driver, similar in function to the 9934 address decoder. The device
has 8 open-collector Darlington power outputs, each capable of
150 mA load current. The outputs are turned on or off by
respectively loading a logic “1” or logic “0” into the device data input.
The required output is defined by a 3-bit address. The device must
be enabled by a CE input line which also serves the function of
further address decoding. A common clear input, CLR, turns all
outputs off when a logic “0” is applied. The device is packaged in a
16-pin plastic DIP or SO package.
FEATURES
8 high-current outputs
Low-loading bus-compatible inputs
Power-on clear ensures safe operation
Will operate in addressable or demultiplex mode
Allows random (addressed) data entry
Easily expandable
Pin-compatible with 9334 (Philips or Fairchild)
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
D1, N Packages
TOP VIEW
NOTE:
1. SOL - Released in Large SO package only.
A0
A1
A2
Q0
Q1
Q2
Q3
GND
VCC
CLR
CE
D
Q7
Q6
Q5
Q4
SL00234
Figure 1. Pin Configuration
APPLICATIONS
Relay driver
Indicator lamp driver
Triac trigger
LED display digit driver
Stepper motor driver
BLOCK DIAGRAM
LATCH
CLR
CE
A0
A1
A2
D
1–OF–8
DECODER
CONTROL
GATE
VCC
OUTPUT STAGE
INPUT STAGE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
SL00235
Figure 2. Block Diagram
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