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參數(shù)資料
| 型號(hào)： | 933730180653 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO24 |
| 封裝： | SO-24 |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大小： | 62K |
| 代理商： | 933730180653 |
September 1993
7
Philips Semiconductors
Product specication
4-to-16 line decoder/demultiplexer with
input latches; inverting
74HC/HCT4515
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (
ICC) for a unit load of 1 is given in the family specifications.
To determine
ICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
INPUT
UNIT LOAD COEFFICIENT
An
LE
E
0.65
1.40
1.00
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HCT
VCC
(V)
WAVEFORMS
+25
40 to+85 40 to +125
min.
typ.
max.
min. max.
min.
max.
tPHL/ tPLH
propagation delay
An to Qn
30
55
69
83
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
LE to Qn
29
50
63
75
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
E to Qn
18
40
50
60
ns
4.5
Fig.6
tTHL/ tTLH
output transition time
7
15
19
22
ns
4.5
Fig.6
tW
latch enable pulse width
HIGH
16
3
20
24
ns
4.5
Fig.7
tsu
set-up time
An to LE
18
9
23
27
ns
4.5
Fig.7
th
hold time
An to LE
3
2
3
ns
4.5
Fig.7
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