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參數資料
| 型號： | 933728070118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 時鐘/數據恢復及定時提取 |
| 英文描述： | REAL TIME CLOCK, PDSO16 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-162-1, SO-16 |
| 文件頁數： | 8/28頁 |
| 文件大?。?/td> | 136K |
| 代理商： | 933728070118 |
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2003 Jan 27
16
Philips Semiconductors
Product specication
Clock/calendar with serial I/O
PCF8573
13 AC CHARACTERISTICS
VSS2 =0V; Tamb = 40 to +85 °C unless otherwise specied. Typical values at Tamb = +25 °C.
Notes
1. All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL
and VIH with an input voltage swing of VSS to VDD.
2. A detailed description of the I2C-bus specification, with applications, is given in brochure
“The I2C-bus and how to
use it”. This brochure may be ordered using the code 9398 393 40011.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Rise and fall times of input signals
tr
rise time
input EXTPF
1
s
input PFIN
∞
s
all other inputs (levels
between VIL and VIH)
1
s
tf
fall time
input EXTPF
1
s
input PFIN
∞
s
all other inputs (levels
between VIL and VIH)
0.3
s
Oscillator
Cosc
integrated oscillator capacitance
40
pF
Rf
oscillator feedback resistance
3
M
f
osc
oscillator stability
(VDD VSS1) = 100 mV;
Tamb =25 °C;
(VDD VSS1) = 1.55 V
2
× 107
Quartz crystal parameters (f = 32.768 kHz)
Rs
series resistance
40
k
CL
parallel load capacitance
10
pF
CT
trimmer capacitance
5
25
pF
I2C-bus timing (see Fig.13; notes 1 and 2)
fSCL
SCL clock frequency
100
kHz
tSP
tolerable spike width on bus
100
ns
tBUF
bus free time
4.7
s
tSU;STA
START condition set-up time
4.7
s
tHD;STA
START condition hold time
4.0
s
tLOW
SCL LOW time
4.7
s
tHIGH
SCL HIGH time
4.0
s
tr
SCL and SDA rise time
1.0
s
tf
SCL and SDA fall time
0.3
s
tSU;DAT
data set-up time
250
ns
tHD;DAT
data hold time
0
ns
tVD;DAT
SCL LOW to data out valid
3.4
s
tSU;STO
STOP condition set-up time
4.0
s
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