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參數(shù)資料
| 型號： | 933672900602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | F/FAST SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, SOT-38-4, DIP-16 |
| 文件頁數(shù)： | 3/3頁 |
| 文件大小： | 94K |
| 代理商： | 933672900602 |
January 1995
3
Philips Semiconductors
Product specication
Dual 4-input NOR gate
HEF4002B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
5
60
120
ns
33 ns
+ (0,55 ns/pF) CL
In → On
10
tPHL; tPLH
25
50
ns
14 ns
+ (0,23 ns/pF) CL
15
20
40
ns
12 ns
+ (0,16 ns/pF) CL
Output transition times
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
HIGH to LOW
10
tTHL
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
LOW to HIGH
10
tTLH
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
VDD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
1050 fi +∑ (foCL) × VDD2
where
dissipation per
10
4300 fi +∑ (foCL) × VDD2
fi = input freq. (MHz)
package (P)
15
11 700 fi +∑ (foCL) × VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (f
oCL) = sum of outputs
VDD = supply voltage (V)
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