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參數(shù)資料
| 型號(hào)： | 933671040652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | HC/UH SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDIP24 |
| 封裝： | DIP-24 |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 74K |
| 代理商： | 933671040652 |
September 1993
6
Philips Semiconductors
Product specication
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
40 to +85
40 to +125
min.
typ.
max.
min.
max.
min.
max.
tPHL/ tPLH
propagation delay
An to Qn
74
27
22
230
46
39
290
58
49
345
69
59
ns
2.0
4.5
6.0
Fig.6
tPHL/ tPLH
propagation delay
LE to Qn
74
27
22
230
46
39
290
58
49
345
69
59
ns
2.0
4.5
6.0
Fig.6
tPHL/ tPLH
propagation delay
E to Qn
41
15
12
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.6
tTHL/ tTLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.6
tW
latch enable pulse width
HIGH
80
16
14
5
4
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.7
tsu
set-up time
An to LE
90
18
15
25
9
7
115
23
20
135
27
23
ns
2.0
4.5
6.0
Fig.7
th
hold time
An to LE
1
11
4
3
1
ns
2.0
4.5
6.0
Fig.7
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