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參數(shù)資料
| 型號(hào)： | 933670030652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計(jì)數(shù)移位寄存器 |
| 英文描述： | HCT SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP16 |
| 封裝： | SOT-38-1, DIP-16 |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 69K |
| 代理商： | 933670030652 |
December 1990
5
Philips Semiconductors
Product specication
8-bit parallel-in/serial-out shift register
74HC/HCT165
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
40 to +85
40 to +125
min.
typ.
max.
min.
max.
min.
max.
tPHL/ tPLH
propagation delay
CE, CP to Q7, Q7
52
19
15
165
33
28
205
41
35
250
50
43
ns
2.0
4.5
6.0
Fig.6
tPHL/ tPLH
propagation delay
PL to Q7, Q7
50
18
14
165
33
28
205
41
35
250
50
43
ns
2.0
4.5
6.0
Fig.6
tPHL/ tPLH
propagation delay
D7 to Q7, Q7
36
13
10
120
24
20
150
30
26
180
36
31
ns
2.0
4.5
6.0
Fig.6
tTHL/ tTLH
output transition
time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.6
tW
clock pulse width
HIGH or LOW
80
16
14
17
6
5
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.6
tW
parallel load pulse
width; LOW
80
16
14
5
4
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.6
trem
removal time
PL to CP, CE
100
20
17
22
8
6
125
25
21
150
30
26
ns
2.0
4.5
6.0
Fig.6
tsu
set-up time
Ds to CP, CE
80
16
14
11
4
3
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.6
tsu
set-up time
CE to CP;
CP to CE
80
16
14
17
6
5
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.6
tsu
set-up time
Dn to PL
80
16
14
22
8
6
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.6
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