參數(shù)資料
型號(hào)： 933373050652
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 門(mén)電路
英文描述： 4000/14000/40000 SERIES, TRIPLE 3-INPUT OR GATE, PDSO14
封裝： PLASTIC, SOT-108-1, SO-14
文件頁(yè)數(shù)： 3/3頁(yè)
文件大?。?/td> 25K
代理商： 933373050652
January 1995
3
Philips Semiconductors
Product specication
Triple 3-input OR gate
HEF4075B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
In → On
5
65
130
ns
38 ns
+ (0,55 ns/pF) CL
HIGH to LOW
10
tPHL
30
60
ns
19 ns
+ (0,23 ns/pF) CL
15
20
40
ns
12 ns
+ (0,16 ns/pF) CL
5
65
130
ns
38 ns
+ (0,55 ns/pF) CL
LOW to HIGH
10
tPLH
30
60
ns
19 ns
+ (0,23 ns/pF) CL
15
25
50
ns
17 ns
+ (0,16 ns/pF) CL
Output transition times
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
HIGH to LOW
10
tTHL
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
LOW to HIGH
10
tTLH
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
VDD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
750 fi +∑ (foCL) × VDD2
where
dissipation per
10
3 600 fi +∑ (foCL) × VDD2
fi = input freq. (MHz)
package (P)
15
11 200 fi +∑ (foCL) × VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
相關(guān)PDF資料
PDF描述
933373070653 4000/14000/40000 SERIES, QUAD 2-INPUT XNOR GATE, PDSO14
933373070652 4000/14000/40000 SERIES, QUAD 2-INPUT XNOR GATE, PDSO14
933334260652 4000/14000/40000 SERIES, QUAD 2-INPUT XNOR GATE, PDIP14
933373100652 4000/14000/40000 SERIES, DUAL 4-INPUT AND GATE, PDSO14
933373100653 4000/14000/40000 SERIES, DUAL 4-INPUT AND GATE, PDSO14
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