參數(shù)資料
型號： 933372590653
廠商： NXP SEMICONDUCTORS
元件分類： 門電路
英文描述： 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14
封裝： PLASTIC, SOT-108-1, SO-14
文件頁數(shù)： 3/6頁
文件大小： 90K
代理商： 933372590653
January 1995
3
Philips Semiconductors
Product specication
Quadruple 2-input NOR gate
HEF4001B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
TYP
MAX
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
In → On
5
60
120
ns
33 ns
+ (0,55 ns/pF) CL
HIGH to LOW
10
tPHL
25
50
ns
14 ns
+ (0,23 ns/pF) CL
15
20
40
ns
12 ns
+ (0,16 ns/pF) CL
5
50
100
ns
23 ns
+ (0,55 ns/pF) CL
LOW to HIGH
10
tPLH
25
45
ns
14 ns
+ (0,23 ns/pF) CL
15
20
35
ns
12 ns
+ (0,16 ns/pF) CL
Output transition times
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
HIGH to LOW
10
tTHL
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
LOW to HIGH
10
tTLH
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
VDD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
1100 fi + ∑ (foCL) × VDD2
where
dissipation per
10
5000 fi + ∑ (foCL) × VDD2
fi = input freq. (MHz)
package (P)
15
14 200 fi + ∑ (foCL) × VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑(foCL) = sum of outputs
VDD = supply voltage (V)
相關(guān)PDF資料
PDF描述
935200630112 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14
933277590652 4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, PDIP14
933372640653 4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, PDSO14
933372640652 4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, PDSO14
933277620652 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 10-BIT UP RING COUNTER, PDIP16
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