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參數(shù)資料
| 型號： | 933324320652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)器 |
| 英文描述： | 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16 |
| 封裝： | PLASTIC, SOT-38-1, DIP-16 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 126K |
| 代理商： | 933324320652 |
January 1995
2
Philips Semiconductors
Product specication
Binary up/down counter
HEF4516B
MSI
DESCRIPTION
The HEF4516B is an edge-triggered synchronous
up/down 4-bit binary counter with a clock input (CP), an
up/down count control input (UP/DN), an active LOW
count enable input (CE), an asynchronous active HIGH
parallel load input (PL), four parallel inputs (P0 to P3), four
parallel outputs (O0 to O3), an active LOW terminal count
output (TC), and an overriding asynchronous master reset
input (MR).
Information on P0 to P3 is loaded into the counter while PL
is HIGH, independent of all other input conditions except
MR which must be LOW. When PL and CE are LOW, the
counter changes on the LOW to HIGH transition of CP.
Input UP/DN determines the direction of the count, HIGH
for counting up, LOW for counting down. When counting
up, TC is LOW when O0 and O3 are HIGH and CE is LOW.
When counting down, TC is LOW when O0 to O3 and
CE are LOW. A HIGH on MR resets the counter (O0 to
O3 = LOW) independent of all other input conditions.
Fig.1 Functional diagram.
HEF4516BP(N):
16-lead DIL; plastic (SOT38-1)
HEF4516BD(F):
16-lead DIL; ceramic (cerdip) (SOT74)
HEF4516BT(D):
16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
PINNING
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
PL
parallel load input (active HIGH)
P0 to P3
parallel inputs
CE
count enable input (active LOW)
CP
clock pulse input (LOW to HIGH,
edge triggered)
UP/DN
up/down count control input
MR
master reset input
TC
terminal count output (active LOW)
O0 to O3
parallel outputs
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