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參數(shù)資料
| 型號： | 933282740652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 門電路 |
| 英文描述： | 4000/14000/40000 SERIES, QUAD 2-INPUT XOR GATE, PDIP14 |
| 封裝： | PLASTIC, SOT-27-1, DIP-14 |
| 文件頁數(shù)： | 3/3頁 |
| 文件大?。?/td> | 28K |
| 代理商： | 933282740652 |
January 1995
3
Philips Semiconductors
Product specication
Quadruple exclusive-OR gate
HEF4030B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
In → On
5
85
175
ns
57 ns
+ (0,55 ns/pF) C
L
HIGH to LOW
10
tPHL
35
75
ns
24 ns
+ (0,23 ns/pF) C
L
15
30
55
ns
22 ns
+ (0,16 ns/pF) C
L
5
75
150
ns
47 ns
+ (0,55 ns/pF) C
L
LOW to HIGH
10
tPLH
30
65
ns
19 ns
+ (0,23 ns/pF) C
L
15
25
50
ns
17 ns
+ (0,16 ns/pF) C
L
Output transition times
5
60
120
ns
10 ns
+ (1,0 ns/pF) C
L
HIGH to LOW
10
tTHL
30
60
ns
9 ns
+ (0,42 ns/pF) C
L
15
20
40
ns
6 ns
+ (0,28 ns/pF) C
L
5
60
120
ns
10 ns
+ (1,0 ns/pF) C
L
LOW to HIGH
10
tTLH
30
60
ns
9 ns
+ (0,42 ns/pF) C
L
15
20
40
ns
6 ns
+ (0,28 ns/pF) C
L
VDD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
1 100 fi +∑(fo CL) × VDD2
where
dissipation per
10
4 900 fi +∑(fo CL) × VDD2
fi = input freq. (MHz)
package (P)
15
14 400 fi +∑(fo CL) × VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑(f
oCL) = sum of outputs
VDD = supply voltage (V)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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