
19
92HD75B
V 1.0 01-09
4-CHANNEL HD AUDIO CODECS OPTIMIZED FOR LOW POWER
92HD75B
4-CHANNEL HD AUDIO CODECS OPTIMIZED FOR LOW POWER
PC AUDIO
Table 7. Valid Digital Mic Configurations
Digital Mics
Data Sample
ADC Conn.
Notes
0
N/A
No Digital Microphones
1
Single Edge
0, or 1
Available on either DMIC_0 or DMIC_1
Both ADC Channels produce data, may be in phase or out by 1/2 DMIC_CLK
period depending upon external configuration and timing
2
Double Edge on
either DMIC_0 or 1
OR
Single Edge on
DMIC_0 and 1
0, or 1
Available on either DMIC_0 or DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second Digital Mic
right channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. If both DMIC_0 and DMIC_1 are used to
support 2 digital microphones, 2 separate ADC units will be used, however, this
configuration is not recommended since it consumes two stereo ADC resources.
3
Double Edge on
one DMIC pin and
Single Edge on the
second DMIC pin.
0, or 1
Requires both DMIC_0 AND DMIC_1, External logic required to support sampling
on a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. Two ADC units are required to support
this configuration
4
Double Edge
0, or 1
Connected to DMIC_0 and DMIC_1, External logic required to support sampling
on a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. Two ADC units are required to support
this configuration
Table 8. DMIC_CLK and DMIC_0,1 Operation During Power States
Power State
DMIC Widget
Enabled?
DMIC_CLK
Output
DMIC_0,1
Notes
D0
Yes
Clock Capable
Input Capable
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
D1
Yes
Clock Disabled
Input Disabled
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
D2
Yes
Clock Disabled
Input Disabled
DMIC_CLK Remains Low
D3
Yes
Clock Disabled
Input Disabled
DMIC_CLK Remains Low
D0-D3
No
Clock Disabled
Input Disabled
DMIC_CLK is HIGH-Z with Weak Pull-down