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參數(shù)資料
| 型號： | 9164001MEA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | Buffer和線驅(qū)動 |
| 英文描述： | QUAD LINE RECEIVER, CDIP16 |
| 封裝： | CERDIP-16 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 283K |
| 代理商： | 9164001MEA |
Original Creation Date: 01/23/96
Last Update Date: 09/26/96
Last Major Revision Date: 01/23/96
MNDS26C32AM-X REV 0A0
MILITARY DATA SHEET
CMOS QUAD DIFFERENTIAL LINE RECEIVER
General Description
The DS26C32A is a quad differential line receiver designed to meet the RS-422, RS-423, and
Federal Standards 1020 to 1030 for balanced and unbalanced digital data transmission,
while retaining the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV over the common mode input voltage range
of + 7V.
Each receiver is also equipped with input fail-safe circuitry, which causes the
output to go to a logic "1" state when the inputs are open.
The DS26C32A provides an enable and disable function common to all four receivers, and
features TRI-STATE outputs with 6 mA source and sink capability.
This product is pin
compatible with the DS26LS32A and the AM26LS32.
NS Part Numbers
DS26C32AME/883 *
DS26C32AMJ/883 **
DS26C32AMW/883 ***
Industry Part Number
DS26C32A
Prime Die
DS26C32
Controlling Document
9164001M2A*,MEA**,MFA***
Processing
MIL-STD-883, Method 5004
Quality Conformance Inspection
MIL-STD-883, Method 5005
Subgrp Description
Temp ( C)
o
1
Static tests at
+25
2
Static tests at
+125
3
Static tests at
-55
4
Dynamic tests at
+25
5
Dynamic tests at
+125
6
Dynamic tests at
-55
7
Functional tests at
+25
8A
Functional tests at
+125
8B
Functional tests at
-55
9
Switching tests at
+25
10
Switching tests at
+125
11
Switching tests at
-55
1
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