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參數(shù)資料
| 型號： | 89HPES3T3ZABCG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線控制器 |
| 英文描述： | 3-Lane 3-Port PCI Express Switch |
| 中文描述： | PCI BUS CONTROLLER, PBGA144 |
| 封裝： | 13 X 13 MM, 1 MM PITCH, GREEN, CABGA-144 |
| 文件頁數(shù)： | 1/23頁 |
| 文件大小： | 242K |
| 代理商： | 89HPES3T3ZABCG |
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September 7, 2007
2007 Integrated Device Technology, Inc.
*Notice: The information in this document is subject to change without notice
A
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Devic e Overview
The 89HPES3T3 is a member of IDT’s PRECISE famly of PCI
Express switching solutions. The PES3T3 is a 3-lane, 3-port peripheral
chip that performs PCI Express Base switching. It provides connectivity
and switching functions between a PCI Express upstreamport and up to
four downstreamports and supports switching between downstream
ports.
Features
High Performance PCI Express Switch
– Three 2.5Gbps PCI Express lanes
– Three switch ports
– x1 Upstreamport
– Two x1 Downstreamports
– Low latency cut-through switch architecture
– Support for Max payload sizes up to 256 bytes
– One virtual channel
– Eight traffic classes
– PCI Express Base Specification Revision 1.1 compliant
◆
Flexible Architecture with Numerous Configuration Options
– Automatic lane reversal on all ports
– Automatic polarity inversion on all lanes
– Ability to load device configuration fromserial EEPROM
◆
Legacy Support
– PCI compatible INTx emulation
– Bus locking
◆
Highly Integrated Solution
– Requires no external components
– Incorporates on-chip internal memory for packet buffering and
queueing
– Integrates three 2.5 Gbps embedded SerDes with 8B/10B
encoder/decoder (no separate transceivers needed)
◆
Reliability, Availability, and Serviceability (RAS) Features
– Internal end-to-end parity protection on all TLPs ensures data
integrity even in systems that do not implement end-to-end
CRC (ECRC)
– Supports ECRC and Advanced Error Reporting
– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
– Compatible with Hot-Plug I/O expanders used on PC mother-
boards
◆
Power Management
– Utilizes advanced low-power design techniques to achieve low
typical power consumption
– Supports PCI Power Management Interface specification (PCI-
PM1.2)
– Unused SerDes are disabled.
– Supports Advanced Configuration and Power Interface Speci-
fication, Revision 2.0 (ACPI) supporting active link state
◆
Testability and Debug Features
– Built in Pseudo-RandomBit Stream(PRBS) generator
– Numerous SerDes test modes
– Ability to bypass link training and force any link into any mode
– Provides statistics and performance counters
Block Diagram
Figure 1 Internal Block Diagram
3-Port Switch Core / 3 PCI Express Lanes
Frame Buffer
Route Table
Port
Arbitration
Scheduler
SerDes
Phy
Logical
Layer
Mux / Demux
Transaction Layer
Data Link Layer
(Port 0)
(Port 2)
SerDes
Phy
Logical
Layer
Mux / Demux
Transaction Layer
Data Link Layer
SerDes
Phy
Logical
Layer
Mux / Demux
Transaction Layer
Data Link Layer
(Port 3)
89HPES3T3
Data Sheet
Advance Information*
3-Lane 3-Port
PCI Express Switch
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 89HPES3T3ZBBC | 制造商:Integrated Device Technology Inc 功能描述:PCI EXPRESS SWIT 144CABGA - Rail/Tube 制造商:Integrated Device Technology Inc 功能描述:IDT 89HPES3T3ZBBC Interface Misc |
| 89HPES3T3ZBBC8 | 制造商:Integrated Device Technology Inc 功能描述:I/O EXPANSION SWIT - Tape and Reel |
| 89HPES3T3ZBBCG | 功能描述:接口-I/O擴展器 RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| 89HPES3T3ZBBCG8 | 功能描述:接口-I/O擴展器 RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| 89HPES3T3ZBBCGI | 功能描述:接口-I/O擴展器 RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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