參數(shù)資料
型號(hào)： 82093AA
廠商： INTEL CORP
元件分類(lèi)： 中斷控制器
英文描述： I/O ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (IOAPIC)
中文描述： INTERRUPT CONTROLLER, PQFP64
封裝： PLASTIC, QFP-64
文件頁(yè)數(shù)： 1/20頁(yè)
文件大?。?/td> 178K
代理商： 82093AA
E
PRELIMINARY
INTEL CORPORATION 1996
May 1996
Order Number: 290566-001
Provides Multiprocessor Interrupt
Management
Dynamic Interrupt Distribution-
Routing Interrupt to the Lowest
Priority Processor
Software Programmable Control of
Interrupt Inputs
Off Loads Interrupt Related Traffic
From the Memory Bus
24 Programmable Interrupts
13 ISA Interrupts Supported
4 PCI Interrupts
1 Interrupt/SMI# Rerouting
2 Motherboard Interrupts
1 Interrupt Used for INTR Input
3 General Purpose Interrupts
Independently Programmable for
Edge/Level Sensitivity Interrupts
Each Interrupt Can Be Programmed
to Respond to Active High or Low
Inputs
X-Bus Interface
CS For Flexible Decode of the
IOAPIC Device.
Index Register Interface for
Optimum Memory Usage
Registers are 32-Bit Wide to Match
the PCI to Host Bridge Architecture
Package 64-Pin PQFP
The 82093AA I/O Advanced Programmable Interrupt Controller (IOAPIC) provides multi-processor interrupt
management and incorporates both static and dynamic symmetric interrupt distribution across all processors. In
systems with multiple I/O subsystems, each subsystem can have its own set of interrupts. Each interrupt pin is
individually programmable as either edge or level triggered. The interrupt vector and interrupt steering
information can be specified per interrupt. An indirect register accessing scheme optimizes the memory space
needed to access the IOAPIC’s internal registers. To increase system flexibility when assigning memory space
usage, the The IOAPIC’s 2-register memory space is re-locatable.
System
Bus
Interface
APIC
Bus
Interface
Clock
And
Reset
D[7:0]
D/I#
A[1:0]
RD#
WR#
CS#
APCIREQ#
APICACK1#
APICACK2#
RESET
CLK
APCID[1:0]
APCICLK
APCID[1:0]
APCICLK
APCICLK
Interrupt
Controller
Test
TESTIN#
IOA_BLK
Figure 1. IOAPIC Simplified Block Diagram
82093AA I/O ADVANCED
PROGRAMMABLE INTERRUPT
CONTROLLER (IOAPIC)
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