參數(shù)資料
型號(hào)： 7P800ATA2514C25
英文描述： Flash Memory Card(800M位閃速存儲(chǔ)器卡)
中文描述： 閃存卡（800米位閃速存儲(chǔ)器卡）
文件頁數(shù)： 9/62頁
文件大小： 626K
代理商： 7P800ATA2514C25
7PxxxATA25xxC25
June 2000 Rev. 1 – ECO #12936
9
White Electronic Designs Corporation
(508) 366-5151
2. Task File Register Access Specifications
There are two cases of Task File register mapping, one is the mapped I/O address area, the other is the mapped
Memory address area. Each case of Task File register read and write operations is executed under the condition as
follows. That area can be accessed by Byte/Word/Odd Byte mode which is defined by the PC card standard
specifications.
(1) I/O address map
Task File Register Read Access Mode (1)
Mode
-REG
-CE2
-CE1
A0
-IORD -IOWR -OE
-WE
D8 to D15 D0 to D7
Standby mode
×
H
H
×
×
×
×
×
High-Z
High-Z
Byte access (8-bit)
L
H
L
L
L
H
H
H
High-Z
even byte
L
H
L
H
L
H
H
H
High-Z
odd byte
Word access (16-bit)
L
L
L
×
×
L
H
H
H
odd byte
even byte
Odd byte access (8-bit)
Note:
×
: L or H
L
L
H
L
H
H
H
odd byte
High-Z
Task File Register Write Access Mode (1)
Mode
-REG
-CE2
-CE1
A0
-IORD -IOWR -OE
-WE
D8 to D15 D0 to D7
Standby mode
×
H
H
×
×
×
×
×
Don’t care Don’t care
Byte access (8-bit)
L
H
L
L
H
L
H
H
Don’t care even byte
L
H
L
H
H
L
H
H
Don’t care odd byte
Word access (16-bit)
L
L
L
×
×
H
L
H
H
odd byte
even byte
Odd byte access (8-bit)
Note:
×
: L or H
L
L
H
H
L
H
H
odd byte
Don’t care
Task File Register Access Timing Example (1)
A0 to A10
-REG
-CE2/-CE1
-IORD
-IOWR
D0 to D15
Dout
read cycle
Din
write cycle
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