參數(shù)資料
型號(hào): 7P512FLG0602I15
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類(lèi): PROM
英文描述: 256K X 16 FLASH 12V PROM CARD, 150 ns, XMA68
封裝: CARD-68
文件頁(yè)數(shù): 9/11頁(yè)
文件大小: 344K
代理商: 7P512FLG0602I15
PCMCIA Flash Memory Card
FLG Series
7
White Electronic Designs
June, 2003
Rev. 4
White Electronic Designs Corp. reserves the right to change products or specications without notice.
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
SYM (PCMCIA)
Parameter
150ns
200ns
Unit
Min
Max
Min
Max
tCW
Write Cycle Time
150
200
ns
tw(WE)
Write Pulse Width
80
120
ns
tsu(A)
Address Setup Time
20
ns
tsu(A-WEH)
Address Setup Time for WE#
100
ns
tsu(CE-WEH)
Card Enable Setup Time for WE#
100
ns
tsu(D-WEH)
Data Setup Time for WE#
50
ns
th(D)
Data Hold Time
20
ns
trec(WE)
Write Recover Time
20
ns
tdis(WE)
Output Disable Time from WE#
60
ns
tdis(OE)
Output Disable Time from OE#
60
ns
ten(WE)
Output Enable Time from WE#
5
ns
ten(OE)
Output Enable Time from OE#
5
ns
tsu(OE-WE)
Output Enable Setup from WE#
10
ns
th(OE-WE)
Output Enable Hold from WE#
10
ns
tsu(CE)
Card Enable Setup Time from OE#
0
ns
th(CE)
Card Enable Hold Time
20
ns
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specications.
WRITE TIMING PARAMETERS
WRITE TIMING DIAGRAM
Notes: 1. Signal may be high or low in this area.
2. When the data I/O pins are in the output state, no signals shall be applied to the data pins (D15 - D0) by the host system.
A[25::0], REG#
tC(W)
CE1#, CE2#
OE#
D[15::0](DIN)
tW(WE)
tSU(A)
NOTE 1
DATA INPUT
tSU(A-WEH)
tSU(CE)
NOTE 1
tREC(WE)
tH(CE)
tSU(OE-WE)
tH(D)
tEN(WE)
D[15::0](DOUT)
WE#
tSU(CE-WEH)
tH(OE-WE)
tDIS(OE)
tDIS(WE)
NOTE 2
tSU(D-WEH)
tEN(OE)
相關(guān)PDF資料
PDF描述
7P512FLG1302I15 256K X 16 FLASH 12V PROM CARD, 150 ns, XMA68
7P512FLG1500C15 256K X 16 FLASH 12V PROM CARD, 150 ns, XMA68
7P512FLG1601I15 256K X 16 FLASH 12V PROM CARD, 150 ns, XMA68
7P512FLG1401C15 256K X 16 FLASH 12V PROM CARD, 150 ns, XMA68
7P512FLG1600C15 256K X 16 FLASH 12V PROM CARD, 150 ns, XMA68
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