參數(shù)資料
型號: 7LVC646APWDH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Octal bus transceiver/register 3-State
中文描述: LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
文件頁數(shù): 8/16頁
文件大?。?/td> 138K
代理商: 7LVC646APWDH
Philips Semiconductors
Product specification
74LVC646A
Octal bus transceiver/register (3-State)
1998 Jul 29
8
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
2.5 ns; C
L
= 50 pF
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V
±
0.3V
V
CC
= 2.7V
V
=
1.2V
TYP
UNIT
MIN
TYP
1
MAX
MIN
MAX
t
PHL
/t
PLH
Propagation delay
An, Bn to Bn, An
Propagation delay
CP
AB
, CP
BA
to B
n
, A
n
Propagation delay
S
AB
, S
BA
to B
n
, A
n
3-State output enable time
OEn to An, Bn
3-State output disable time
OEn to An, Bn
3-State output enable time
DIR to An, Bn
3-State output disable time
DIR to An, Bn
Clock pulse width
HIGH or LOW
CP
AB
or CP
BA
Set-up time
An, Bn to CP
AB
, CP
BA
Hold time
An, Bn to CP
AB
, CP
BA
Maximum clock pulse frequency
Figures 1, 6
1.5
3.9
6.8
1.5
7.8
15
ns
t
PHL/
t
PLH
Figures 2, 6
1.5
4.6
7.6
1.5
8.6
19
ns
t
PHL/
t
PLH
Figures 3, 6
1.5
4.9
8.5
1.5
9.5
19
ns
t
PZH
/t
PZL
Figures 4, 6
1.5
4.5
7.8
1.5
8.8
20
ns
t
PHZ
/t
PLZ
Figures 4, 6
1.5
3.9
6.1
1.5
7.1
10
ns
t
PZH
/t
PZL
Figures 5, 6
1.5
4.6
7.9
1.5
8.9
20
ns
t
PHZ
/t
PLZ
Figures 5, 6
1.5
3.5
6.0
1.5
7.0
12
ns
t
W
Figure 1, 3
3.3
1.9
3.3
ns
t
su
Figure 2
1.6
0.35
1.6
ns
t
h
Figure 2
1.0
–0.3
1.0
ns
f
max
Figure 2
150
250
125
ns
NOTE:
1. These typical values are at V
CC
= 3.3V and T
amb
= 25
°
C.
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