參數(shù)資料
型號: 7ABT273APWDH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Octal D-type flip-flop
中文描述: D FLIP-FLOP, PDSO20
封裝: 4.40 MM, LEAD FREE AND HALOGEN FREE, PLASTIC, MO-153AC, TSSOP-8
文件頁數(shù): 2/12頁
文件大?。?/td> 104K
代理商: 7ABT273APWDH
Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
2
1995 Sep 06
853-1774 15704
FEATURES
Eight edge-triggered D-type flip-flops
Buffered common clock
Buffered asynchronous Master Reset
Power-up reset
See 74ABT377 for clock enable version
See 74ABT373 for transparent latch version
See 74ABT374 for 3-State version
ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
200 V per machine model.
DESCRIPTION
The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common elements.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
CP to Qn
C
L
= 50pF; V
CC
= 5V
3.0
3.4
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
3.5
pF
I
CCH
Total supply current
Outputs High; V
CC
=5.5V
150
μ
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic DIP
–40
°
C to +85
°
C
74ABT273A N
74ABT273A N
SOT146-1
20-Pin plastic SO
–40
°
C to +85
°
C
74ABT273A D
74ABT273A D
SOT163-1
20-Pin Plastic SSOP Type II
–40
°
C to +85
°
C
74ABT273A DB
74ABT273A DB
SOT339-1
20-Pin Plastic TSSOP Type I
–40
°
C to +85
°
C
74ABT273A PW
7ABT273APW DH
SOT360-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
Q4
GND
D4
D5
Q5
Q6
D6
D7
Q7
V
CC
CP
SA00052
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
11
CP
Clock pulse input (active rising edge)
3, 4, 7, 8, 13,
14, 17, 18
D0 - D7
Data inputs
2, 5, 6, 9, 12,
15, 16, 19
Q0 - Q7
Data outputs
1
MR
Master Reset input (active-Low)
10
GND
Ground (0V)
20
V
CC
Positive supply voltage
相關(guān)PDF資料
PDF描述
7ABT2952PWDH Octal registered transceiver 3-State
7ABT373APWDH Octal transparent latch 3-State
7ABT543APWDH Octal latched transceiver with dual enable 3-State
7ABT574APWDH Octal D-type flip-flop 3-State
7ABT646APWDH Octal bus transceiver/register 3-State
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
7ABT2952PWDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Octal registered transceiver 3-State
7ABT373APWDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Octal transparent latch 3-State
7ABT543APWDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Octal latched transceiver with dual enable 3-State
7ABT574APWDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Octal D-type flip-flop 3-State
7ABT646APWDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Octal bus transceiver/register 3-State