參數(shù)資料
型號: 79RC32T355-180DHI
廠商: Integrated Device Technology, Inc.
英文描述: IDT Interprise Integrated Communications Processor
中文描述: IDT的洽談會集成通信處理器
文件頁數(shù): 27/47頁
文件大?。?/td> 987K
代理商: 79RC32T355-180DHI
27 of 47
May 25, 2004
IDT 79RC32355
Signal
Symbol
Reference
Edge
133MHz
150MHz
180MHz
Unit
Conditions
Timing
Diagram
Reference
Min
Max
Min
Max
Min
Max
ATM Interface, Utopia Mode
1, 2
1.
ATM Utopia clock (RXCLKP and TXCLKP) frequency must be equal to or less than 1/2 CLKP frequency.
2.
All Utopia Mode pins are multiplexed on the ATM interface pins as described in Table 9.
RXCLKP, TXCLKP
1
Tperiod1
none
40
40
40
ns
25 MHz Utopia
Figure 14
Thigh1,Tlow1
16
16
16
ns
Trise1,Tfall1
4
4
4
ns
RXCLKP, TXCLKP
1
Tperiod1
none
30
30
30
ns
33 MHz Utopia
Thigh1,Tlow1
12
12
12
ns
Trise1,Tfall1
3
3
3
ns
RXCLKP, TXCLKP
Tperiod1
none
20
20
20
ns
50 MHz Utopia
Thigh,Tlow1
8
8
8
ns
Trise1,Tfall1
2
2
2
ns
TXFULLN
Tsu2
TXCLKP
rising
2
2
2
ns
Thld2
2
2
2
ns
TXDATA[7:0], TXSOC,
TXENBN, TXADDR[1:0]
Tdo3
TXCLKP
rising
4
8
4
8
4
8
ns
RXDATA[7:0], RXEMP-
TYN, RXSOC
Tsu4
RXCLKP
rising
3
3
3
ns
Thld4
2
2
2
ns
RXADDR[1:0], RXENBN
Tdo5
RXCLKP
rising
3
8
3
8
3
8
ns
Table 8 ATM AC Timing Characteristics
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