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參數(shù)資料
| 型號： | 79RC32334-133BB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | IDT Interprise Integrated Communications Processor |
| 中文描述： | IDT的洽談會集成通信處理器 |
| 文件頁數(shù)： | 5/30頁 |
| 文件大?。?/td> | 467K |
| 代理商： | 79RC32334-133BB |
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August 31, 2004
IDT 79RC32334—Rev. Y
Pin Description Table
The following table lists the pins provided on the RC32334. Note that those pin names followed by ”_n” are active-low signals. All external pull-ups
and pull-downs require
10 k
resistor.
Name
Type
Reset
State
Status
Drive
Strength
Capability
Description
Local System Interface
mem_data[31:0]
I/O
Z
High
Local System Data Bus
Primary data bus for memory. I/O and SDRAM.
mem_addr[25:2]
I/O
[25:10] Z
[9:2] L
[25:17] Low
[16:2] High
Memory Address Bus
These signals provide the Memory or DRAM address, during a Memory or DRAM bus transaction. During
each word data, the address increments either in linear or sub-block ordering, depending on the transac-
tion type. The table below indicates how the memory write enable signals are used to address discreet
memory port width types.
mem_addr[22] Alternate function: reset_boot_mode[1].
mem_addr[21] Alternate function: reset_boot_mode[0].
mem_addr[20] Alternate function: reset_pci_host_mode.
mem_addr[19] Alternate function: modebit [9].
mem_addr[18] Alternate function: modebit [8].
mem_addr[17] Alternate function: modebit [7].
mem_addr[16] Alternate function: sdram_addr[16].
mem_addr[15] Alternate function: sdram_addr[15].
mem_addr[14] Alternate function: sdram_addr[14].
mem_addr[13] Alternate function: sdram_addr[13].
mem_addr[11] Alternate function: sdram_addr[11].
mem_addr[10] Alternate function: sdram_addr[10].
mem_addr[9] Alternate function: sdram_addr[9].
mem_addr[8] Alternate function: sdram_addr[8].
mem_addr[7] Alternate function: sdram_addr[7].
mem_addr[6] Alternate function: sdram_addr[6].
mem_addr[5] Alternate function: sdram_addr[5].
mem_addr[4] Alternate function: sdram_addr[4].
mem_addr[3] Alternate function: sdram_addr[3].
mem_addr[2] Alternate function: sdram_addr[2].
mem_cs_n[5:0]
Output
H
Low with
internal
pull-up
Memory Chip Select Negated
Recommend external pull-up.
Signals that a Memory Bank is actively selected.
mem_oe_n
Output
H
High
Memory Output Enable Negated
Recommend external pull-up.
Signals that a Memory Bank can output its data lines onto the cpu_ad bus.
Table 1 Pin Description (Part 1 of 7)
Port Width
Pin Signals
mem_we_n[3]
mem_we_n[2]
mem_we_n[1]
mem_we_n[0]
DMA (32-bit) mem_we_n[3]
mem_we_n[2]
mem_we_n[1]
mem_we_n[0]
32-bit
mem_we_n[3]
mem_we_n[2]
mem_we_n[1]
mem_we_n[0]
16-bit
Byte High Write Enable mem_addr[1]
Not Used (Driven
Low)
Byte Low Write
Enable
8-bit
Not Used (Driven High) mem_addr[1]
mem_addr[0]
Byte Write Enable
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 79RC32334-133BBG | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBGI | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBI | IDT Interprise Integrated Communications Processor |
| 79RC32334-150BB | IDT Interprise Integrated Communications Processor |
| 79RC32351 | IDT Interprise Integrated Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 79RC32334-133BBG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-150BB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-150BBG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
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