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參數(shù)資料
| 型號： | 79RC32334-100BBI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | IDT Interprise Integrated Communications Processor |
| 中文描述： | IDT的洽談會(huì)集成通信處理器 |
| 文件頁數(shù)： | 14/30頁 |
| 文件大?。?/td> | 467K |
| 代理商： | 79RC32334-100BBI |
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14 of 30
August 31, 2004
IDT 79RC32334—Rev. Y
Clock Parameters — RC32334
(Ta = 0
°
C to +70
°
C Commercial, Ta = -40
°
C to +85
°
C Industrial, V
cc
I/O = +3.3V
±
5%,V
cc
Core = +3.3V
±
5%)
Reset Specification
Figure 3 Mode Configuration Interface Cold Reset Sequence
Parameter
Symbol
Test Conditions
RC32334
100MHz
RC32334
133MHz
RC32334
150MHz
Units
Min
Max
Min
Max
Min
Max
cpu_masterclock HIGH
t
MCHIGH
Transition
≤
2ns
8
—
6.75
—
6
—
ns
cpu_masterclock LOW
t
MCLOW
Transition
≤
2ns
8
—
6.75
—
6
—
ns
cpu_masterclock period
1
1.
cpu_masterclock frequency should never be below pci_clk frequency if PCI interface is used.
2.
Rise and fall times are measured between 10% and 90%
3.
Output_clk should not be used in a system. Only the cpu_masterclock or its derivative must be used to drive all the subsystems with designs based on the
RC32334 device. Refer to the RC3233x Device Errata for more information.
t
MCP
—
20
66.6
15
66.6
13.33
66.6
ns
cpu_masterclock Rise & Fall Time
2
t
MCRise,
t
MCFall
—
—
3
—
3
—
3
ns
cpu_masterclock Jitter
t
JITTER
—
—
+ 250
—
+ 250
—
+ 200
ps
pci_clk Rise & Fall Time
t
PCRise,
t
PCFall
PCI 2.2
—
1.6
—
1.6
—
1.6
ns
pci_clk Period
1
t
PCP
15
—
15
—
15
—
ns
jtag_tck Rise & Fall Time
t
JCRise,
t
JCFall
—
—
5
—
5
—
5
ns
ejtag_dck period
t
DCK,
t
11
10
—
10
—
10
—
ns
jtag_tck clock period
t
TCK,
t
3
100
—
100
—
100
—
ns
ejtag_dclk High, Low Time
t
DCK High,
t
9
t
DCK Low,
t
10
4
—
4
—
4
—
ns
ejtag_dclk Rise, Fall Time
t
DCK Rise,
t
9
t
DCK Fall,
t
10
—
1
—
1
—
1
ns
output_clk
3
Tdo21
N/A
N/A
N/A
N/A
N/A
N/A
—
cpu_coldreset_n
Asserted during power-up
power-on sequence
120
—
120
—
120
—
ms
cpu_coldreset_n Rise Time
t
CRRise
—
5
—
5
—
5
ns
Table 5 Clock Parameters - RC32334
VCC
cpu_coldreset_n
modebit[9:0]
>= 110 ms
cpu_masterclk
(MClk)
>= 10 ms
120 ms
t
CRRise
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 79RC32334-133BB | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBG | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBGI | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBI | IDT Interprise Integrated Communications Processor |
| 79RC32334-150BB | IDT Interprise Integrated Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 79RC32334-133BB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-150BB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
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