2006 Teridian Semiconductor Corporation Rev. 2." />
參數(shù)資料
型號: 78P2351R-IMR/F
廠商: Maxim Integrated Products
文件頁數(shù): 28/31頁
文件大?。?/td> 0K
描述: IC LIU NRZ-CMI CONV 155M 56-QFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: E4,OC-3,STM1-E
電源電壓: 3.15 V ~ 3.45 V
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤
供應商設備封裝: 56-QFN-EP(7x7)
包裝: 帶卷 (TR)
78P2351R
Serial 155M
NRZ to CMI Converter
Page: 6 of 31
2006 Teridian Semiconductor Corporation
Rev. 2.1
Pulse Amplitude Adjustment
Contact TDK applications for information on user
programmable registers with up to 200mV of
programmable transmit gain.
Transmit Backplane Equalizer
An optional fixed LVPECL equalizer is integrated in
the transmit path for architectures that use LIUs on
active interface cards.
The fixed equalizer can
compensate for up to 1.5m of trace and can be
enabled by the TXOUT1 pin or TXEQ bit as follows:
TXOUT1 pin
TXEQ bit
Tx Equalizer
Low
1
Enabled
Float
0
Disabled
POWER-DOWN FUNCTION
Power-down control is provided to allow the
78P2351R to be shut off.
Transmit and receive
power-down can be set independently through SW
control.
Global power-down is achieved by
powering down both the transmitter and receiver.
Note: the 4-wire serial port interface and
configuration registers are not affected by power-
down.
The transmitter can also be powered down using the
TXPD control pin. The CMI outputs are tri-stated
during
transmit
power-down
for
redundancy
applications.
The TXPD pin is active in both
hardware and software modes.
LOOPBACK MODES
In SW mode, LLBK and RLBK bits in the Signal
Control register are provided to activate the local
and remote analog loopback modes respectively.
In HW mode, the LPBK pin can be used to activate
local and remote analog loopback paths as shown in
the table below.
LPBK pin Loopback Mode
Low
Normal operation
Float
Remote (analog) Loopback:
Recovered receive clock and data
looped back directly to the transmit
driver. The CMI decoder and most of
transmit path is bypassed (including the
redundant Tx monitor output)
High
Local (analog) Loopback:
Transmit clock and data looped back to
receiver at the analog media interface.
TD +
TD -
RD +
RD -
CMI
ENDEC
CDR
Adaptive
Eq.
Fixed
Eq.
CDR
Line-side
Figure 3: Remote (analog) Loopback
TD +
TD -
RD +
RD -
CMI
ENDEC
CDR
Adaptive
Eq.
Fixed
Eq.
CDR
Figure 4: Local (analog) Loopback
In SW mode only, a Full Remote (digital) Loopback
bit FLBK is also available in the Advanced Tx
Control register. This loopback exercises the entire
Rx and Tx paths of the 78P2351 including the Tx
clock recovery unit. As such, the user must enable
either Plesiochronous or Loop-timing transmit modes
to utilize the Full Remote (digital) Loopback.
TD +
TD -
RD +
RD -
CMI
ENDEC
CDR
Adaptive
Eq.
Fixed
Eq.
CDR
Line-side
Figure 5: Remote (Digital) Loopback
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