參數(shù)資料
型號： 7820
廠商： Maxwell Technologies, Inc
英文描述： Microprocessor-compatible 8-Bit ADC
中文描述： 微處理器兼容的8位ADC
文件頁數(shù)： 2/18頁
文件大?。?/td> 244K
代理商： 7820
M
2
All data sheets are subject to change without notice
2003 Maxwell Technologies
All rights reserved.
Mcroprocessor-compatible 8-Bit ADC
7820
09.09.03 Rev 3
T
ABLE
1. P
IN
D
ESCRIPTION
P
IN
S
YMBOL
D
ESCRIPTION
1
V
IN
DB0
Analog Input Range: V
REF(-)
to V
REF(+)
.
Data Output. Three State Output, bit 0 (LSB)
2
3
DB1
Data Output. Three State Output, bit 1
4
DB2
Data Output. Three State Output, bit 2
5
DB3
Data Output. Three State Output, bit 3
6
WR/RDY
WRITE control input/READY status output.
7
Mode
Mode Selection Input. It determnes whether the device operates in the
WR-RD or RD mode. It is internally tied to GND through a 50 μA current
source.
8
RD
READ Input. RD must be low to access data fromthe part.
9
INT
INTERUPT Output. INT going low indicates that the conversion is com-
plete INT returns high on rising the edge of RD or CS.
10
GND
Ground
11
V
REF-
V
REF+
CS
Lower limt of reference span. Range: GND < V
REF(-)
< V
REF(+)
Upper limt of reference span. Range: GND < V
REF(-)
< V
REF(+)
< V
DD
Chip Select Input. CS, the decoded device address, must be low for RD
or WR to be recognized by the converter.
12
13
14
DB4
Data Output. Three State Output, bit 4
15
DB5
Data Output. Three State Output, bit 5
16
DB6
Data Output. Three State Output, bit 6
17
DB7
Data Output. Three State Output, bit 7 (MSB)
18
OFL
Overflow Output. If the analog input is higher than (V
REF(+)
- 1/2LSB),
OFL will be low at the end of conversion. It is a non three state output
which can be used to cascade 2 or more devices to increase resolution.
19
NC
No Connection.
20
V
DD
Power supply voltage, +5V
T
ABLE
2. 7820 A
BSOLUTE
M
AXIMUM
R
ATINGS1
P
ARAMETER
M
IN
M
AX
U
NIT
V
DD
to GND
Digital Input Voltage to GND (Pins 6-80, 13)
Digital Output Voltage to GND (Pins 2-5, 9, 14-18)
V
REF
(+) to GND
V
REF
(-) to GND
-0
-0.3
0.3
0
7.0
V
V
V
V
V
V
DD
+0.3
V
DD
+0.3
V
DD
+0.3
V
REF
(+)
V
SS
-0.3
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