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參數(shù)資料
| 型號： | 74VHC175SJ |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FLIP FLOP QUAD D TYPE 16SOP |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 系列： | 74VHC |
| 功能： | 主復(fù)位 |
| 類型： | D 型總線 |
| 輸出類型： | 差分 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 4 |
| 頻率 - 時鐘： | 210MHz |
| 延遲時間 - 傳輸： | 4.9ns |
| 觸發(fā)器類型： | 正邊沿 |
| 輸出電流高，低： | 8mA，8mA |
| 電源電壓： | 2 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.209"，5.30mm 寬） |
| 包裝： | 管件 |
74VHC175
Quad
D-T
ype
Flip-Flop
1993 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74VHC175 Rev. 1.2
5
AC Electrical Characteristics
Notes:
3. Parameter guaranteed by design. tOSLH = |tPLHmax – tPLHmin|; tOSHL =| tPHLmax – tPHLmin|.
4. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load. Average operating current can be obtained from the equation:
ICC (opr.) = CPD VCC fIN + ICC/4 (per F/F), and the total CPD when n pcs of the Flip-Flop operate can be calculated
by the following equation: CPD (total) = 30 + 14 n
AC Operating Requirements
Note:
5. VCC is 3.3 ± 0.3V or 5.0 ± 0.5V
Symbol
Parameter
VCC (V) Conditions
TA = 25°C
TA = –40°C
to +85°C
Units
Min.
Typ.
Max.
Min.
Max.
fMAX
Maximum Clock
Frequency
3.3 ± 0.3
CL = 15pF
90
140
75
MHz
CL = 50pF
50
75
45
5.0 ± 0.5
CL = 15pF
150
210
125
MHz
CL = 50pF
85
115
75
tPLH, tPHL
Propagation Delay Time,
(CP to Qn or Qn)
3.3 ± 0.3
CL = 15pF
7.5
11.5
1.0
13.5
ns
CL = 50pF
10.0
15.0
1.0
17.0
5.0 ± 0.5
CL = 15pF
4.8
7.3
1.0
8.5
ns
CL = 50pF
6.3
9.3
1.0
10.5
tPLH, tPHL
Propagation Delay Time,
(MR to Qn or Qn)
3.3 ± 0.3
CL = 15pF
6.3
10.1
1.0
12.0
ns
CL = 50pF
8.8
13.6
1.0
15.5
5.0 ± 0.5
CL = 15pF
4.3
6.4
1.0
7.5
ns
CL = 50pF
5.8
8.4
1.0
9.5
tOSLH, tOSHL Output to Output Skew
3.3 ± 0.3
CL = 50pF
1.5
5.0 ± 0.5
CL = 50pF
(3)
1.0
CIN
Input Capacitance
VCC = Open
4
10
pF
CPD
Power Dissipation
Capacitance
(4)
44
pF
Symbol
Parameter
VCC (V)
(5)
TA = 25°C
TA = –40°C to +85°C
Units
Typ.
Guaranteed Minimum
tW(L), tW(H) Minimum Pulse Width (CP)
3.3
5.0
ns
5.0
tW(L)
Minimum Pulse Width (MR)
3.3
5.0
ns
5.0
tS
Minimum Setup Time (Dn to CP)
3.3
5.0
ns
5.0
4.0
tH
Minimum Hold Time (Dn to CP)
3.3
1.0
ns
5.0
1.0
tREC
Minimum Removal Time (MR)
3.3
5.0
ns
5.0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74VHC175SJ_Q | 功能描述:觸發(fā)器 Qd D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74VHC175SJX | 功能描述:觸發(fā)器 Qd D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74VHC1G50DTTI | 制造商:undefined 功能描述: |
| 74VHC20 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DUAL 4-INPUT NAND GATE |
| 74VHC20_04 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DUAL 4-INPUT NAND GATE |
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