DC Electrical Characteristics (Continued) Note 5: Output impedance " />
參數(shù)資料
型號(hào): 74VHC161284MTDX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 6/11頁(yè)
文件大?。?/td> 0K
描述: TXRX BIDIRECT IEEE 48TSSOP
標(biāo)準(zhǔn)包裝: 1
系列: 74VHC
邏輯類型: IEEE STD 1284 轉(zhuǎn)換收發(fā)器
電源電壓: 4.5 V ~ 5.5 V
位數(shù): 8
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 74VHC161284MTDXFSDKR
www.fairchildsemi.com
4
74VHC161284
DC Electrical Characteristics (Continued)
Note 5: Output impedance is measured with the output active LOW and active HIGH (HD
HIGH).
Note 6: This parameter is guaranteed but not tested, characterized only.
Note 7: Power-down leakage to VCC is tested by simultaneously forcing all pins on the cable-side (B1–B8, Y9–Y13, PLH, C14–C17 and HLHIN to 5.5V and
measuring the resulting ICC.
Symbol
Parameter
VCC
TA 40qC to 85qC
Units
Conditions
(V)
Guaranteed Limits
VOL
Maximum LOW Level Output Voltage
An, HLH
4.5
0.1
V
IOL 50 PA
4.5
0.44
IOL 8 mA
Bn, Yn
4.5
0.77
IOL 14 mA
PLH
4.5
0.7
IOL 84 mA
RD
Maximum Output Impedance
B1–B8, Y9–Y13
5.0
55
:
(Note 5)(Note 6)
Minimum Output Impedance
B1–B8, Y9–Y13
5.0
35
:
(Note 5)(Note 6)
RP
Maximum Pull-Up Resistance
B1–B8, Y9–Y13, C14–C17
5.0
1650
:
Minimum Pull-Up Resistance
B1–B8, Y9–Y13, C14–C17
5.0
1150
:
IIH
Maximum Input Current in HIGH State
A9–A13, PLHIN, HD, DIR, HLHIN
5.5
1.0
PA
VI 5.5V
C14–C17
5.5
100
VI 5.5V
IIL
Maximum Input Current in LOW State
A9–A13, PLHIN, HD, DIR, HLHIN
5.5
1.0
PAVI 0.0V
C14–C17
5.5
5.0
mA
VI 0.0V
IOZH
Maximum Output Disable Current
A1—A8
5.5
20
PA
VO 5.5V
(HIGH)
B1–B8
5.5
100
VO 5.5V
IOZL
Maximum Output Disable Current
A1—A8
5.5
20
PAVO 0.0V
(LOW)
B1–B8
5.5
5.0
mA
IOFF
Power Down Output Leakage
B1–B8, Y9–Y13, PLH
0.0
100
PAVO 5.5V
IOFF
Power Down Input Leakage
C14–C17, HLHIN
0.0
100
PAVI 5.5V
IOFF ICC
Power Down Leakage to VCC
0.0
250
PA (Note 7)
ICC
Maximum Supply Current
5.5
70
mA
VI VCC or GND
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