參數(shù)資料
型號: 74V2G07
廠商: 意法半導(dǎo)體
英文描述: TRIPLE BUFFER (OPEN DRAIN)
中文描述: 三重緩沖(開漏)
文件頁數(shù): 4/9頁
文件大?。?/td> 199K
代理商: 74V2G07
74V2G07
4/9
CAPACITIVE CHARACTERISTICS
1) C
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
TEST CIRCUIT
C
L
= 15/50pF or equivalent (includes jig and probe capacitance)
R
1
= 1K
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
)
WAVEFORM: PROPAGATION DELAY
(f=1MHz; 50% duty cycle)
Symbol
Parameter
Test Condition
Value
Unit
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
Input Capacitance
Output
Capacitance
Power Dissipation
Capacitance
(note 1)
4
5
10
10
10
10
10
10
pF
pF
C
OUT
C
PD
3
pF
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74V2G07CTR 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:TRIPLE BUFFER (OPEN DRAIN)
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74V2G08 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DUAL 2-INPUT AND GATE
74V2G08CTR 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LOGIC GATE|DUAL 2-INPUT OR|CMOS|TSSOP|8PIN|PLASTIC
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