參數(shù)資料
型號: 74LVX257MTR
廠商: 意法半導體
英文描述: LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) WITH 5V TOLERANT INPUTS
中文描述: 低電壓CMOS Quad使用5V容限輸入2通道多路復用器(3態(tài))
文件頁數(shù): 1/10頁
文件大?。?/td> 258K
代理商: 74LVX257MTR
1/10
July 2001
I
HIGH SPEED:
t
PD
=5.8ns (TYP.) at V
CC
= 3.3V
5V TOLERANT INPUTS
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
V
IL
= 0.8V, V
IH
= 2V at V
CC
=3V
LOW POWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25°C
LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
=3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4 mA (MIN) at V
CC
=3V
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257
IMPROVED LATCH-UP IMMUNITY
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I
I
I
I
I
I
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DESCRIPTION
The 74LVX257 is a low voltage CMOS QUAD 2
CHANNEL MULTIPLEXER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
It is composed of four independent 2-channel
multiplexers with common SELECT and ENABLE
(OE) INPUT. The 74LVX257 is a non-inverting
multiplexer. When the ENABLE INPUT is held
"High", all outputs become in high impedance
state. If SELECT INPUT is held "Low", "A" data is
selected, when SELECT INPUT is "High", "B"
data is chosen.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVX257
LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER
(3-STATE) WITH 5V TOLERANT INPUTS
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
SOP
TSSOP
74LVX257M
74LVX257MTR
74LVX257TTR
TSSOP
SOP
相關(guān)PDF資料
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74LVX257TTR LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) WITH 5V TOLERANT INPUTS
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