
February 1993
Revised March 1999
7
1999 Fairchild Semiconductor Corporation
DS011551.prf
www.fairchildsemi.com
74LVX00
Low Voltage Quad 2-Input NAND Gate
General Description
The LVX00 contains four 2-input NAND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
Features
I
Input voltage level translation from 5V to 3V
I
Ideal for low power/low noise 3.3V applications
I
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number
74LVX00M
74LVX00SJ
74LVX00MTC
Package Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
A
n
, B
n
O
n
Inputs
Outputs